Communication styles for parallel systems

Groß, Thomas; Hinrichs, Susan; O’Hallaron, David R.; Stricker, Thomas M.; Hasegawa, A.

doi:10.1109/2.335726

Cited by 3 publications

(3 citation statements)

References 6 publications

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“…Kung advocates systolic communication for the Warp and iWarp machines, and reports on software implementations for these architectures show various combinations of a systolic software approach similar to that advocated in this pattern and the less-efficient, but easier to implement, simulation of systolic arrays [1,8,16,17,6]. Additionally, Gross and Lam describe a compiler for Warp that exploits the systolic software pattern when possible [7].…”

Section: Known Usesmentioning

confidence: 99%

A pattern for efficient parallel computation on multicore processors with scalar operand networks

Hoffmann¹,

Devadas²,

Agarwal³

2010

Proceedings of the 2010 Workshop on Parallel Programming Patterns

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Systolic arrays have long been used to develop custom hardware because they result in designs that are efficient and scalable. Many researchers have explored ways to exploit systolic designs in programmable processors; however, such efforts often result in the simulation of large systolic arrays on a general purpose platforms. While simulation can add flexibility and problem size independence, it comes at a cost of greatly reducing the efficiency of the original systolic approach. This paper presents a pattern for developing parallel programs using systolic designs to execute efficiently (without resorting to simulation) on modern multicore processors featuring scalar operand networks. This pattern provides a compromise solution that can achieve high efficiency and flexibility given appropriate hardware support. Several examples illustrate the application of this pattern to produce parallel implementations of matrix multiplication and convolution.

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Section: Known Usesmentioning

confidence: 99%

A pattern for efficient parallel computation on multicore processors with scalar operand networks

Hoffmann¹,

Devadas²,

Agarwal³

2010

Proceedings of the 2010 Workshop on Parallel Programming Patterns

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“…Δυστυχώς, η λύση των συστολικών πινάκων είναι περιορισμένης εμβέλειας όπως και αυτή των μηχανών SIMD, αλλά αποτελεί για τα προβλήματα στα οποία μπορεί να εφαρμοστεί, μία χαμηλού κόστους και αποδοτική προσέγγιση. Το γεγονός αυτό έχει οδηγήσει στη ανάπτυξη μηχανών MIMD οι οποίες μπορούν να λειτουργήσουν και σαν συστολικοί πίνακες (iWarp [Gros94]).…”

Section: αρχιτεκτονική παράλληλων υπολογιστώνunclassified

Αλγοριθμοι Συμπιεσης Μονοδιαστατων Ημιπεριοδικων Βιοιατρικων Σηματων Και Μεθοδοι Παραλληλοποιησης Τους

Μπαρλασ¹

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ΕισαγωγήΙ. Σκοπιμότητα 1 II. Δομή της διατριβής III. Συμβολή της διατριβής IV. Εργασίες Κεφάλαιο 1 : Κωδικοποίηση της εξόδου αλγορίθμων συμπίεσης βιοϊατρικών σημάτων με τη βοήθεια "λεξικού" Ι. Εισαγωγή Π. Ανασκόπηση μεθόδων κωδικοποίησης ΙΙ.1. Κωδικοποίηση με στατιστική μοντελοποίηση Π.

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“…It has been used in combination with message passing in the iWarp system [17,18]. In [19], the compiler inserts the commands needed to establish the needed connections in the network before the communication takes place.…”

Section: Compile-time and Load-time Prediction Of Working Setsmentioning

confidence: 99%

Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks

Ding

Hoare

Jones

et al.

19th IEEE International Parallel and Distributed Processing Symposium

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Communication styles for parallel systems

Cited by 3 publications

References 6 publications

A pattern for efficient parallel computation on multicore processors with scalar operand networks

A pattern for efficient parallel computation on multicore processors with scalar operand networks

Αλγοριθμοι Συμπιεσης Μονοδιαστατων Ημιπεριοδικων Βιοιατρικων Σηματων Και Μεθοδοι Παραλληλοποιησης Τους

Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks

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