Communication synthesis and HW/SW integration for embedded system design

Gogniat, Guy; Auguin, Michel; Bianco, Luc; Pégatoquet, Alain

doi:10.1109/hsc.1998.666237

Cited by 11 publications

(3 citation statements)

References 6 publications

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“…Yen and Wolf [YW95] mapped a multiprocess description to processing elements (PEs) and developed heuristics to determine the communication resources on the target architecture. In [GABP98], Gogniat et al proposed the communication interface generation method from partitioned and scheduled system model for HW/SW interfaces for co-design of embedded systems. Ortega and Borriello looked at a retargetable modeling scheme for maximum utilization of bus bandwidth in [OB98].…”

Section: Related Workmentioning

confidence: 99%

Automatic generation of bus functional models fromtransaction level models

Shin

Abdi

Gajski

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)

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Section: Related Workmentioning

confidence: 99%

Automatic generation of bus functional models fromtransaction level models

Shin

Abdi

Gajski

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)

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“…P. Chou et al [2] propose an interface HW/SW cosynthesis work, which synthesizes driver codes as well as glue hardware logic to connect I/O controllers. G. Gognoit et al proposed communication synthesis and HW/SW integration for Embedded System Design in [4].…”

Section: Registersmentioning

confidence: 99%

Optimal Allocation of I/O Device Parameters in Hardware and Software Codesign Methodology

Lin

Huang

Chen

Embedded and Ubiquitous Computing

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Abstract. For a programmable I/O device controller, the allocation of device parameters on I/O registers affects the code size and execution time of its associated I/O device driver. In traditional design flow, the development of device drivers can not begin until the allocation is fixed. This paper presents a new design methodology that allows a designer to seek an allocation that reduces the software or hardware cost concurrently with developing device drivers. The software cost means the code size or execution time and the hardware cost the number of I/O registers. The exact allocation with the minimum cost under constraints is formulated as zero-one integer linear programming problem. Heuristic algorithms based on iterative refinement are also proposed. The proposed design methodology was implemented in C language. Compared with current industrial designs, the approach can obtain design alternatives that reduce both software and hardware costs. Furthermore, the experimental results also investigate design spaces for various application features. It turns out that the HW/SW codesign approach is favorable in development of embedded systems.

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“…Most of the work has been done in optimizing communication architectures for specific designs. In [5], Gogniat et al describe mechanism for interfacing HW/SW interfaces for co-design of embedded systems. Ortega et.…”

Section: Related Workmentioning

confidence: 99%