Compact low voltage four quadrant CMOS currentmultiplier

Ravindran, Arun; Ramarao, K.; López, Eva María Vidal; Ismail, Mohammed

doi:10.1049/el:20010988

Cited by 29 publications

(10 citation statements)

References 5 publications

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“…Many current multipliers reported in this area are found to be working at C3 V [1][2][3][5][6][7][8][9][10]. In [11] Ravindran et al have proposed a low voltage current multiplier based on class AB operation working at ±1.5 V. The current multiplier developed in this paper operates at ±1 V.…”

Section: Introductionmentioning

confidence: 99%

Low-voltage bulk-driven class AB four quadrant CMOS current multiplier

Aggarwal¹,

Gupta

2010

Analog Integr Circ Sig Process

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In this paper a low voltage bulk-driven class AB four quadrant current multiplier is proposed. For the proposed multiplier a bulk-driven class AB current mode cell has been developed and the drain current equations for NMOS and PMOS transistors of the proposed cell have been derived. This cell is used as a basic building block for bulk-driven low voltage current squarer and copier circuit, which is finally used as the fundamental building block of the proposed low-voltage bulk-driven current multiplier operating at ±1 V. All the circuits are simulated using SPICE for 0.25 lm CMOS technology.

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Section: Introductionmentioning

confidence: 99%

Low-voltage bulk-driven class AB four quadrant CMOS current multiplier

Aggarwal¹,

Gupta

2010

Analog Integr Circ Sig Process

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“…Nonlinear circuits [1][2][3][4][5][6][7][8][9][10] have been published. Some nonlinear circuits operated in the voltage mode [1,2] and some others were designed to operate in the current mode [3][4][5]. In the recent past, the analog circuit design using the currentmode approach has gained considerable attention.…”

Section: Introductionmentioning

confidence: 99%

Versatile analog squarer and multiplier free from body effect

Chaisayun¹,

Piangprantong

Dejhan

2011

Analog Integr Circ Sig Process

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This paper proposes the analog CMOS squarer and the four-quadrant analog CMOS multiplier. The major advantages of the proposed circuits are low voltage supply, multifunction of output, and insensitive to the threshold voltage variation caused by body effect. The versatile squarer has two inputs (V in and I in ). Its output can be the square of V in or the square of I in . The versatile fourquadrant multiplier has four inputs (V X , I X , V Y , and I Y ). Its output can be the product of V X and V Y , the product of I X and I Y , the product of V X and I Y , or the product of V Y and I X . Therefore, the proposed circuits can be applied more than conventional circuits and have good performance. Secondorder effects and frequency response are analyzed. Simulation results have verified the workability of the circuits. Experimental results are done to confirm the operation of the circuits.

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“…Different CMOS multipliers using MOS transistors operating in the saturation region have been reported recently [1][2][3][4]. The multipliers based in the class AB topology would perform better if not affected by mismatches between PMOS and NMOS transconductances.…”

Section: Introductionmentioning

confidence: 99%