Compact Modeling of Emerging Technologies with VHDL-AMS

Perri

2021

In this paper, in order to analyze the limits of CNTFET devices, we study the behavior of a differential amplifier based on CNTFET for application between 50 GHz and 500 GHz, determining the highest gain achievable with low noise level. In particular the examined circuit presents a differential input and single ended output, in which each CNTFET is composed by a single CNT, having the same diameter. The analysis is done without considering embedding parasitic effects since our aim is to study the intrinsic limits of CNTFET. We find a solution that is near optimum for gain and noise. In particular we obtain that, using CNTFETs whose channel length is 25 nm, it is possible to reach 27.0 dB gain at 50 GHz and 19.7 dB gain at 500 GHz with a noise spectral power density noise 95 nV/Hz 1/2 and 85 nV/Hz 1/2 respectively.

Section: A Review Of Our Cntfet Modelmentioning

confidence: 99%

“…Other authors have then assumed these parameters fixed to constant and typical values (i.e. V FB = 0 V 16 and R D = R S = 25 kΩ 20 ), thus losing the dependence of flat band voltage on the CNT diameter.…”

Section: A Review Of Our Cntfet Modelmentioning

confidence: 99%

Analysis of Limits of CNTFET Devices through the Design of a Differential Amplifier

Gelao

Perri

2021

“…In spite of other compact models, [25][26][27] our SPICE model implementation avoids any convergence and overflow problem, without losing in accuracy. Moreover, the complete model was so large that it was organized in several hierarchical circuit pages and it was structured to avoid duplicated code.…”

Section: Spice and Verilog-a Model Implementationmentioning

confidence: 99%

Review—Simulation of A/D Circuits Based on CNTFETs both in SPICE and Verilog-A

Perri²

2023

In this review, through the simulation of some A/D electronic circuits, we implement a semi-empirical compact model for CNTFETs, already proposed by us and briefly recalled, both in SPICE, using ABM library, and in Verilog-A language of ADS, highlighting the differences between the two software. In particular we review the design of a common source amplifier and a phase-shift oscillator, as examples of analog circuits, and the design of NOT and NAND gates, as example of digital circuits, both in SPICE and in Verilog-A, observing that the obtained results are the same in static simulations and comparable in dynamic simulations.

“…A Review of our I-V and C-V CNTFET Model I-V model.-The proposed model is based on a work of A. Raychowdhury et al 14 and on the following improvements introduced in 15,16 to solve some numerical problems of the original paper. 14 The model, developed for a n-type C-CNTFET with semiconductor single wall carbon nanotube having diameters ranging from 1 nm to 4 nm, is based on the hypothesis of ballistic transport.…”

mentioning

confidence: 99%

Study of Power Gain Capability of CNTFET Power Amplifier in THz Frequency Range

Gelao

Perri

2022

In this paper we study the application of a single-CNTFET as power amplifier in the THz frequency range, using a CNTFET model, already proposed by us. We show that the device has, within stable condition, a Maximum Gain of at least 29 dB at frequencies below 30 GHz, decreasing to 20 dB at 800 GHz and reaching 18 dB at 1 THz. Through the analysis of a simple example, we show that it is possible to obtain a stable amplifier with tuned matching with a gain near the Maximum Gain at 1 THz. Finally we show that the matching of this device requires high ratio which could be hard to implement at 1THz.