Compact Spreading Resistance Model for Rectangular Contacts on Uniform and Epitaxial Substrates

Mathematical modeling of electric potential in semiconductors with heterogeneous dopant profile

“…For each separate layer Laplace's equation is solved and then the obtained solutions are "sewn together" on the boundaries proceeding from the following conditions: potential continuity and normal component of current density. Similar techniques of electric field calculation are realized in some later works as applied to semiconductor films produced by modern methods [5,9,10].…”

Modelling of Substrate Noise and Mitigation Schemes for UWB Systems

“…A slightly different approach is to make use of analytical methods where, based on mathematical analysis of waveform functions characterizing the switching current and a transfer function model of the switching noise propagation, closed-form expressions for the switching noise can be derived (18,19). While this method provides more insight into the propagation of switching noise the switching current source still needs to be characterized through SPICE simulations.…”

“…To avoid the need for layout extractions the use of compact models to characterize the spreading resistance between arbitrary sized diffusion contacts on lightly doped substrates has been proposed (19). By doing so the transfer function describing the propagation of the switching noise can be determined without the need for cumbersome layout extractions.…”

Modeling and Design Guidelines for ${\rm P}^{+}$ Guard Rings in Lightly Doped CMOS Substrates

“…However, the noise suppression level of these designs is usually unpredictable and the chip area could easily be wasted as the dependency of the noise suppression performance on guard ring parameters has not been accurately characterized. Recently, efforts have been made to find compact P + guard ring models, which provide more insights into the dependency [4]- [7]. Some of these models require fittingfactors [4], which needs calibration fixtures and therefore are unfeasible for prelayout predictions.…”

“…Some of the models characterize the guard ring by dividing the guard ring into numerous small contacts/cells [5], [6], which increases the model complexity significantly. Other models failed to address the constriction resistances as well as capacitive coupling, which makes them valid only for low frequency designs on uniform or epitaxial substrates [7]. Unlike uniform or epitaxial substrates, the lightly doped substrates of standard CMOS processes have a thin P-well layer [ Fig.…”