Comparative Design of Gate Drivers with Short-Circuit Protection Scheme for SiC MOSFET and Si IGBT

Yin, Shan; Wu, Yingzhe; Liu, Yitao; Pan, Xuewei

doi:10.3390/en12234546

Cited by 16 publications

(8 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A large tb combined with a high desaturation current could lead to an IGBT thermal breakdown. References [16][17][18][19] explain how to improve the desaturation technique by reducing tb even if the IGBT operates with high currents. Therefore, it determines the short-circuit time that the IGBT must withstand.…”

Section: Failure Mechanisms and Operation Of A Full-bridge Modulementioning

confidence: 99%

Online Failure Diagnostic in Full-Bridge Module for Optimum Setup of an IGBT-Based Multilevel Inverter

2022

View full text Add to dashboard Cite

An online failure diagnostic test is essential to ensure the robustness and reliability of high-powered systems. Furthermore, the overall design must comprise diagnostic strategies to detect in-service and high-powered module defects. This paper describes the critical failure mechanisms––cross-conduction, inductive avalanche, second turn-on, VS-undershoot, inrush current, and thermal runaway––that directly affect insulated gate bipolar transistor (IGBT) operation. The constructed inverter contains 18 transformer-based taps (six per phase); however, this work studied a single tap (IGBT-based full-bridge module) to understand the reasons for failure and the routes to mitigate them. Moreover, a cost-effective solution using the IR2127STRPBF driver circuit was implemented to reduce the probability of thermal runaway in case of overcurrent, short-circuit, or avalanche events. For this reason, the electrical current state was adjusted using an FPGA digital resource to perform dynamic PWM control signals. The obtained correlation waveforms are valuable for verifying diagnostic data at the design stage to emphasize the significance of evading premature failure events. The comprehensive study on failure diagnosis enabled successful design strategies to construct a robust 45 kVA three-phase multilevel inverter for a 22 kW eolic-photovoltaic generation plant.

show abstract

Section: Failure Mechanisms and Operation Of A Full-bridge Modulementioning

confidence: 99%

Online Failure Diagnostic in Full-Bridge Module for Optimum Setup of an IGBT-Based Multilevel Inverter

2022

View full text Add to dashboard Cite

show abstract

“…A large tb combined with a high desaturation current could lead to an IGBT thermal breakdown. References [21], [22], [23] and [24] improves the desaturation technique reducing tb even if the IGBT operates with high desaturation currents.…”

Section: Short Circuit Failure Mechanismmentioning

confidence: 99%

Critical Failure Mechanisms in Isolated Three-phase Multilevel Inverters Design

Iglesias-Rojas¹

2021

Preprint

View full text Add to dashboard Cite

<div>Isolated multilevel inverters are widely used in renewable energy systems and industrial applications. Isolated IGBT topologies exploit the usage of low-frequency transformers that improve robustness and reliability. However, critical failure mechanisms should be considered at the design stage to ensure proper performance. This paper describes these critical failure mechanisms, such as short circuit, cross-conduction, IGBT high inductive load avalanche, IGBT second turn-on, VS-undershoot, transformer inrush current, IGBT thermal runaway, and cable switching interference. Furthermore, this paper comprises design techniques to prevent these failures. The previous failure mechanisms come from the inverter's power stage, except switching interference from control signal cables and directly affecting the control device functionality. This work also proposes a circuit topology based on FPGA resources to reduce switching interference from control signal cables. It behaves like a fault tolerant digital input that effectively filters bouncing events shorter than 2μs. Measurements report satisfactory experimental results upon constructing a 45kVA ac-side-isolated 13-level inverter.</div>

show abstract

“…The SC fault can be categorized into two types: hard switching fault (HSF) and fault under load (FUL), which are defined by the time when the SC fault happens at the turn‐on transition and on‐state, respectively. Several SC protection circuits have been proposed in the early works, including desaturation [8–10], current [11],

di/dt

[12, 13], DC‐link voltage [14], gate voltage [15, 16] and gate charge [17–20], and a SC protection time below 1

\umu

s was achieved. The desaturation detection is the most widely used solution with lots of off‐the‐shelf gate driver integrated chips (ICs) [21, 22].…”

Section: Introductionmentioning

confidence: 99%

A digital‐controlled gate charge detection circuit for short‐circuit protection and condition monitoring of SiC MOSFET

Yin

Liu

Xiong

et al. 2022

IET Power Electronics

Self Cite

View full text Add to dashboard Cite

The safe and reliable operation of power converter requires a protection circuit with fast response when the power device is subjected to the short‐circuit (SC) fault. In addition, the on‐line condition monitoring circuit is beneficial to provide a suggestion for the replacement of aged device. The silicon carbide (SiC) power devices promise the higher power density in the system performance, but is still limited by the poor SC reliability issue. Thus, it is crucial to improve the robustness of SiC‐based power converter from the circuit design. This work proposes a novel gate charge detection circuit for SiC devices. It achieves a high‐speed SC protection against hard switching fault (HSF) based on the difference of Miller capacitance between normal condition and SC fault. Meanwhile, the condition monitoring is achieved based on the high gate leakage current of aged device. A high‐precision analog amplifier circuit is designed to acquire the gate signal. The normal/fault signal is distinguished and the protection is triggered using a digital‐controlled method to reduce the hardware cost. A 600‐ns SC response time is achieved, and the monitoring circuit can differentiate the aged device from the healthy one.

show abstract

Comparative Design of Gate Drivers with Short-Circuit Protection Scheme for SiC MOSFET and Si IGBT

Cited by 16 publications

References 27 publications

Online Failure Diagnostic in Full-Bridge Module for Optimum Setup of an IGBT-Based Multilevel Inverter

Online Failure Diagnostic in Full-Bridge Module for Optimum Setup of an IGBT-Based Multilevel Inverter

Critical Failure Mechanisms in Isolated Three-phase Multilevel Inverters Design

A digital‐controlled gate charge detection circuit for short‐circuit protection and condition monitoring of SiC MOSFET

Contact Info

Product

Resources

About