2017
DOI: 10.23919/tems.2017.7961343
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Comparative study of low-pass filter and phase-locked loop type speed filters for sensorless control of AC drives

Abstract: High quality speed information is one of the key issues in machine sensorless drives, which often requires proper filtering of the estimated speed. This paper comparatively studies typical low-pass filters (LPF) and phase-locked loop (PLL) type filters with respect to ramp speed reference tracking and steady-state performances, as well as the achievement of adaptive cutoff frequency control. An improved LPF-based filter structure with no ramping and steady-state errors caused by filter parameter quantization e… Show more

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Cited by 9 publications
(4 citation statements)
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“…"Path Computation" process, along with up-to-date topology DB, allows for light-path establishment using a constrained-routing signaling protocol. proportional/integral control scheme, as in [27]. The higher the gain, the faster the loop reacts to changes.…”
Section: Methods Integrated In Sdn Frameworkmentioning
confidence: 99%
See 1 more Smart Citation
“…"Path Computation" process, along with up-to-date topology DB, allows for light-path establishment using a constrained-routing signaling protocol. proportional/integral control scheme, as in [27]. The higher the gain, the faster the loop reacts to changes.…”
Section: Methods Integrated In Sdn Frameworkmentioning
confidence: 99%
“…For the cases of low transmitter clock standard deviation in the total phase error (J tx ), we can simply base the optimized parameters (bandwidth and gain) on the specification (i.e., targeted jitter to guarantee no guarantee no cycle slip in the ADC sampling) in order to perform a fitting to extract optimal channel spacing. The "Digital LPF", shown in Figure 6, is implemented as simple proportional/integral control scheme, as in [27]. The higher the gain, the faster the loop reacts to changes.…”
Section: Phase Detectormentioning
confidence: 99%
“…Several forms of the PLL have been reported in the literature in recent years, where the main difference is the type PD used such as; time-delay based PLL(TD-PLL) [69]- [72], all-pass filter (APF) [41], [73]- [75], inverse park transform (IPT) [76], [77], second-order generalized integrator (SOGI) [78]- [80], moving average filter (MAF) [81]- [83], low-pass filter(LPF) [84]- [87], etc. The PLL structure used with the GFL converter should have a fast dynamic response (less settling time, less overshoot), accurate grid parameters estimation under any disturbances conditions, simple structure, and robustness during the voltage dip and harmonic presence on input AC signal [88], [89].…”
Section: Pllmentioning
confidence: 99%
“…The presented procedure improves the behavior of a previously chosen PLL (this may be the most appropriate for the application for which it is intended) when modifying the filter. In Reference , a similar idea to that proposed in the submitted manuscript is presented. It was introduced in a power electronics application.…”
Section: Introductionmentioning
confidence: 99%