Comparing Different Decodings for Posit Arithmetic

Murillo, Raúl; Mallasén, David; Barrio, Alberto A. Del; Botella, Guillermo

doi:10.1007/978-3-031-09779-9_6

Cited by 13 publications

(8 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Posit(32,2) TC is more resource efficient than Posit(32,2) SM regarding the logic cell, while the Fmax of Posit(32,2) TC is about the same as that of Posit(32,2) SM . This result is consistent with [24]. Since the Fmax of the two designs is about the same, 𝐹 peak is also comparable.…”

Section: Evaluation Of Posit(322) Arithmetic On Fpgas and Gpus 41 Eva...supporting

confidence: 87%

See 1 more Smart Citation

Evaluation of POSIT Arithmetic with Accelerators

Nakasato,

Murakami,

Kono

et al. 2024

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region

View full text Add to dashboard Cite

We present an evaluation of 32-bit POSIT arithmetic through its implementation as accelerators on FPGAs and GPUs. POSIT, a floating-point number format, adaptively changes the size of its fractional part. We developed hardware designs for FPGAs and software for GPUs to accelerate linear algebra operations using Posit(32,2) arithmetic. Our FPGA-and GPU-based accelerators in Posit(32,2) arithmetic significantly accelerated the Cholesky and LU decomposition algorithms for dense matrices. In terms of numerical accuracy, Posit(32,2) arithmetic is approximately 0.5 -1.0 digits more accurate than the standard 32-bit format, especially when the norm of the elements of the input matrix is close to 1. Evaluating power consumption, we observed that the power efficiency of the accelerators ranged between 0.043 -0.076 Gflops/watts for the LU decomposition in Posit(32,2) arithmetic. The power efficiency of the latest GPUs as accelerators of Posit(32,2) arithmetic is better than that of the evaluated FPGA chip.

show abstract

Section: Evaluation Of Posit(322) Arithmetic On Fpgas and Gpus 41 Eva...supporting

confidence: 87%

“…Another design uses the two's complement integer as the fraction [11]. In [24], they reported that the latter approach requires fewer hardware resources than the former.…”

Section: Fpga Implementationmentioning

confidence: 99%

Evaluation of POSIT Arithmetic with Accelerators

Nakasato,

Murakami,

Kono

et al. 2024

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region

View full text Add to dashboard Cite

show abstract

“…Using FloPoCo, we implemented a library of posit operators that includes the basic arithmetic operations-addition, subtraction, multiplication and division-, as well as units to perform the comparison of operands and conversion with integer arithmetic. More precisely, we rely on the posit arithmetic units designed in our previous works [17], [35], [36],…”

Section: Proposed Approachmentioning

confidence: 99%

Generating Posit-Based Accelerators With High-Level Synthesis

Murillo

Barrio

Botella

et al. 2023

IEEE Trans. Circuits Syst. I

Self Cite

View full text Add to dashboard Cite

Recently, the posit number system has demonstrated a higher accuracy over standard floating-point arithmetic for many scientific applications. However, when it comes to implementing accelerators for these applications, the tool support for this arithmetic format is still missing, especially during the high-level synthesis (HLS) step. In this paper, we incorporate the posit data type into the high-level synthesis (HLS) design process, so that we can generate the register-transfer level (RTL) implementation directly from a given behavioral specification, but using posit numbers instead of the classical floating-point notations. Our evaluations show that, even if posit-based circuits require more area than their floating-point counterparts, they offer higher accuracy when using the same bitwidth. For example, using posit arithmetic can reduce computation errors by about two orders of magnitude when compared to using standard floating-point numbers. Our approach also includes an alternative to mitigate the high overheads of the posits and broadening the potential use of this format. We also propose a hybrid scheme that uses posit numbers only in the private local memory, while the accelerator operates in the classic floatingpoint notation. This solution is useful when the designers want to optimize local memories and data transfers, but still use legacy HLS tools that only support traditional floating-point notations.

show abstract

“…For example, most of the works presenting posit units have tackled the decoding and encoding phases using sign-magnitude. Nonetheless, more recent studies show that a 2's complement approach is more efficient [13].…”

Section: Asic Synthesismentioning

confidence: 99%

“…However, in the latest representation of posits, it is considered to be 1 if the number is positive, or −2 if the number is negative. This simplifies the decoding stage of the posit representation [3], [13].…”

mentioning

confidence: 99%