Comparing incoherent ray performance of TRaX vs. Manta

Kopta, Daniel; Spjut, Josef; Brunvand, Erik; Parker, Steven G.

doi:10.1109/rt.2008.4634646

Cited by 5 publications

(2 citation statements)

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“…We start with our parallel MIMD architecture called TRaX (Threaded Ray eXecution) because it is designed specifically for ray tracing [SKKB09], and because we also believe that the MIMD execution model is better suited to ray tracing than the SIMD execution of existing platforms [KSBP08, KSBD10, SKBD12]. We have made this model publicly available with a cycle‐accurate simulator and LLVM‐based compiler that can be modified for further architectural evaluation [HWR12].…”

Section: Streaming Treelet Ray Tracing Architecture (Strata)mentioning

confidence: 99%

Memory Considerations for Low Energy Ray Tracing

Kopta

Shkurko

Spjut

et al. 2014

Computer Graphics Forum

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We propose two hardware mechanisms to decrease energy consumption on massively parallel graphics processors for ray tracing. First, we use a streaming data model and configure part of the L2 cache into a ray stream memory to enable efficient data processing through ray reordering. This increases L1 hit rates and reduces off‐chip memory energy substantially through better management of off‐chip memory access patterns. To evaluate this model, we augment our architectural simulator with a detailed memory system simulation that includes accurate control, timing and power models for memory controllers and off‐chip dynamic random‐access memory . These details change the results significantly over previous simulations that used a simpler model of off‐chip memory, indicating that this type of memory system simulation is important for realistic simulations that involve external memory. Secondly, we employ reconfigurable special‐purpose pipelines that are constructed dynamically under program control. These pipelines use shared execution units that can be configured to support the common compute kernels that are the foundation of the ray tracing algorithm. This reduces the overhead incurred by on‐chip memory and register accesses. These two synergistic features yield a ray tracing architecture that reduces energy by optimizing both on‐chip and off‐chip memory activity when compared to a more traditional approach.

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Section: Streaming Treelet Ray Tracing Architecture (Strata)mentioning

confidence: 99%

Memory Considerations for Low Energy Ray Tracing

Kopta

Shkurko

Spjut

et al. 2014

Computer Graphics Forum

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“…We use this architecture as a starting point because we also believe that the MIMD execution model is better suited to ray tracing than the SIMD execution of traditional GPUs [Kopta et al 2008;Kopta et al 2010]. In addition, we can modify this architecture using the available tools to create STRaTA.…”

Section: Streaming Treelet Ray Tracing Architecture (Strata)mentioning

confidence: 99%

An energy and bandwidth efficient ray tracing architecture

Kopta

Shkurko

Spjut

et al. 2013

Proceedings of the 5th High-Performance Graphics Conference

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We propose two hardware mechanisms to decrease energy consumption on massively parallel graphics processors for ray tracing while keeping performance high. First, we use a streaming data model and configure part of the L2 cache into a ray stream memory to enable efficient data processing through ray reordering. This increases the L1 hit rate and reduces off-chip memory accesses substantially. Second, we employ reconfigurable specialpurpose pipelines than are constructed dynamically under program control. These pipelines use shared execution units (XUs) that can be configured to support the common compute kernels that are the foundation of the ray tracing algorithm, such as acceleration structure traversal and triangle intersection. This reduces the overhead incurred by memory and register accesses. These two synergistic features yield a ray tracing architecture that significantly reduces both power consumption and off-chip memory traffic when compared to a more traditional cache only approach.

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