Comparing performance and energy efficiency of FPGAs and GPUs for high productivity computing

Betkaoui, Brahim; Thomas, David B.; Luk, Wayne

doi:10.1109/fpt.2010.5681761

Cited by 65 publications

(34 citation statements)

References 17 publications

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“…Jones et al [2] and Luk et al [3] also investigated the same comparison with similar results. In their research, they used benchmarks that have different memory access patterns (different locality).…”

Section: Related Worksupporting

confidence: 57%

“…The main conclusion of their research is that GPUs perform faster than HC-1 in streaming applications. On the other hand, HC-1 is faster and more energy efficient from GPUs for applications that need non-sequential memory accesses [3]. Nagar and Bakos [4] performed an implementation for a double precision floating point sparse matrix-vector multiplier on the Convey HC-1.…”

Section: Related Workmentioning

confidence: 99%

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Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer

et al. 2016

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Abstract:The motivation of this research was to evaluate the main memory performance of a hybrid super computer such as the Convey HC-x, and ascertain how the controller performs in several access scenarios, vis-à-vis hand-coded memory prefetches. Such memory patterns are very useful in stencil computations. The theoretical bandwidth of the memory of the Convey is compared with the results of our measurements. The accurate study of the memory subsystem is particularly useful for users when they are developing their application-specific personality. Experiments were performed to measure the bandwidth between the coprocessor and the memory subsystem. The experiments aimed mainly at measuring the reading access speed of the memory from Application Engines (FPGAs). Different ways of accessing data were used in order to find the most efficient way to access memory. This way was proposed for future work in the Convey HC-x. When performing a series of accesses to memory, non-uniform latencies occur. The Memory Controller of the Convey HC-x in the coprocessor attempts to cover this latency. We measure memory efficiency as a ratio of the number of memory accesses and the number of execution cycles. The result of this measurement converges to one in most cases. In addition, we performed experiments with hand-coded memory accesses. The analysis of the experimental results shows how the memory subsystem and Memory Controllers work. From this work we conclude that the memory controllers do an excellent job, largely because (transparently to the user) they seem to cache large amounts of data, and hence hand-coding is not needed in most situations.

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Section: Related Worksupporting

confidence: 57%

Section: Related Workmentioning

confidence: 99%

Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer

et al. 2016

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“…Similar as the method proposed in [16], we only consider the dynamic power, which is measured as difference between active and idle power. Table 1.…”

Section: System and Experiments Setupmentioning

confidence: 99%

A coarse-grained stream architecture for cryo-electron microscopy images 3D reconstruction

Wang

Duan

Tang

et al. 2012

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays

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The wide acceptance and the data deluge in the bioinformatics and medical imaging processing require more efficient and application-specific systems to be built. Due to the recent advances in FPGAs technologies, there has been a resurgence in research aimed at the design of specialpurpose accelerators for standard computer architectures. In this paper, we exploit this trend towards FPGA-based accelerator design and provide a proof-of-concept and comprehensive case study on FPGA-based accelerator design for a single-particle 3D reconstruction application in singleprecision floating-point format. The proposed stream architecture is built by first offloading computing-intensive software kernels to dedicated hardware modules, which emphasizes the importance of optimizing computing dominated data access patterns. Then configurable computing streams are constructed by arranging the hardware modules and bypass channels to form a linear deep pipeline. The efficiency of the proposed stream architecture is justified by the reported 2.54 times speedup over a 4-cores CPU. In terms of power efficiency, our FPGA-based accelerator introduces a 7.33 and 3.4 times improvement over a 4-cores CPU and an up-to-date GPU device, respectively.

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“…In [10], four representative benchmarking examples including STREAM benchmark, Matrix Multiplication, FFT and Asian Option Pricing were selected to compare the GPU (Tesla C1060) and FPGA (totally 16 Xilinx V5LX330).…”

Section: Related Workmentioning

confidence: 99%

A heterogeneous platform with GPU and FPGA for power efficient high performance computing

Kumar

et al. 2014

2014 International Symposium on Integrated Circuits (ISIC)

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Heterogeneous computing is gaining attention from both industry and academia nowadays. One driving factor for heterogeneous computing is the power efficiency. GPU and FPGA have been reported to achieve much higher power efficiency over CPU on many applications. Comparisons between GPU and FPGA show different characteristics of GPU and FPGA in accelerated computing. Some tasks run better on GPU, some run better on FPGA. Combining GPU and FPGA in one heterogeneous computing platform may provide us the advantages from both sides. This paper presents a heterogeneous computing platform with GPU and FPGA that we have built for power efficient high performance computing. The experimental results of 4 application examples show that different applications have different favorite computing architectures, which suggests a matching of the characteristics between the computation task and the computing architecture is the key to the power efficient high performance computing on heterogeneous computing platforms.

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Comparing performance and energy efficiency of FPGAs and GPUs for high productivity computing

Cited by 65 publications

References 17 publications

Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer

Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer

A coarse-grained stream architecture for cryo-electron microscopy images 3D reconstruction

A heterogeneous platform with GPU and FPGA for power efficient high performance computing

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