Comparison of processing-induced deformations of InP bonded to Si determined by e-beam metrology: Direct vs. adhesive bonding

Abstract

In this paper, we employ an electron beam writer as metrology tool to investigate distortion of an exposed pattern of alignment marks in heterogeneously bonded InP on silicon. After experimental study of three different bonding and processing configurations which represent typical on-chip photonic device fabrication conditions, the smallest degree of linearly-corrected distortion errors is obtained for the directly bonded wafer, with the alignment marks both formed and measured on the same InP layer side after bonding (equivalent to single-sided processing of the bonded layer). Under these conditions, multilayer exposure alignment accuracy is limited by the InP layer deformation after the initial pattern exposure mainly due to the mechanical wafer clamping in the e-beam cassette. Bonding-induced InP layer deformations dominate in cases of direct and BCB bonding when the alignment marks are formed on one InP wafer side, and measured after bonding and substrate removal from another (equivalent to double-sided processing of the bonded layer). The findings of this paper provide valuable insight into the origin of the multilayer exposure misalignment errors for the bonded III-V on Si wafers, and identify important measures that need to be taken to optimize the fabrication procedures for demonstration of efficient and high-performance on-chip photonic integrated devices.

Electrically‐Driven Photonic Crystal Lasers with Ultra‐low Threshold

“…The alignment precision between the features formed by the e-beam and DUV is thus fundamentally limited by the laser writer precision with which the physical mask was manufactured. For multiple e-beam exposures, our estimates indicate that the wafer level statistical 3-sigma standard deviation is below 50 nm and limited by the sidewall roughness of the alignment marks after dry etching, as well as wafer stress non-uniformity [20].…”

“…For multiple e-beam exposures, our estimates indicate that the wafer level statistical 3-sigma standard deviation is below 50 nm and limited by the sidewall roughness of the alignment marks after dry etching, as well as wafer stress non-uniformity. [25] The alignment marks defined in the Si substrate are used for aligning and exposing the buried heterostructure mask pattern into a high-resolution negative-tone hydrogen silsesquioxane (HSQ) resist by e-beam lithography. The glass-like properties of the exposed HSQ enable it to be used directly as a hard mask for the following dry etching and epitaxial regrowth steps without the need for a two-step pattern transfer.…”

Photoluminescence study of InP and In(As, P) inclusions into Si (100) substrate

“…Various techniques such as wafer bonding [6], growth on thick buffer layers [7], template-assisted growth and others have been proposed to integrate A3B5 compounds on Si substrate. In this work, we study the regular arrays of InP and In(As,P) nanoinclusions epitaxially grown in the openings of Si (100) substrates using the recently developed technique described in our previous work [8].…”

Submicron-Size Emitters of the 1.2–1.55 μm Spectral Range Based on InP/InAsP/InP Nanostructures Integrated into Si Substrate

“…Currently, several competing approaches to the integration of III–V semiconductors with a silicon platform are being actively studied: the use of buffer layers [ 9 , 10 , 11 ], wafer bonding methods [ 12 , 13 , 14 , 15 ], selective growth methods [ 7 , 16 , 17 , 18 , 19 , 20 ], and also growth nanostructures using catalyst drops [ 21 , 22 , 23 ]. The most researched are approaches using wafer bonding methods.…”