Comparison of stress, strain, and elastic properties for porous silicon layers supported by substrate and corresponding membranes

Dariani, R.S.; Nazari, Mohammad

doi:10.1016/j.molstruc.2016.04.061

Cited by 9 publications

(2 citation statements)

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“…To address this issue, an important number of articles have been devoted to the investigation of mechanical properties of PSi on Si bulk substrate. [10][11][12][13][14][15][16] However, a focus should be performed on the layer uniformity with anodization, and the complete cancellation of etch residue products and moderate pore volumes. 17,18 Indeed, the latter aspect should be highlighted because the porosity, stress, and roughness of the PSi layer could affect the integration devices.…”

Section: Introductionmentioning

confidence: 99%

“…Therefore, the study of structural and mechanical properties of the post‐anodization process of PSi is inescapable. To address this issue, an important number of articles have been devoted to the investigation of mechanical properties of PSi on Si bulk substrate 10–16 . However, a focus should be performed on the layer uniformity with anodization, and the complete cancellation of etch residue products and moderate pore volumes 17,18 .…”

Section: Introductionmentioning

confidence: 99%

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Structural and nanomechanical properties of porous silicon: Cheap substrate for CMOS process industry

Belaroussi

Scheen

Saadi³

et al. 2020

Surface & Interface Analysis

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The surface topology of porous silicon (PSi) is a relevant parameter that decides the compatibility of such substrate with CMOS process. Using standard resistivity (1–10 Ω·cm) of Si substrate to fabricate PSi‐S is a low cost solution for the industry. In this paper, through an atomic force microscopy (AFM) analysis, the root mean square (RMS) roughness, the power spectral density and the correlation length were determined for different PSi layers. Furthermore, the measured hardness, Young's modulus, and stress have been made for different thicknesses of PSi: 5, 10, 50, and 200 μm. The obtained results demonstrated that very interesting properties have been achieved with the 50 μm‐thick PSi‐S layer with a maximum porosity around 65%, a surface roughness less than 1 nm and a hardness value of (~1 GPa). The realized results encourage the utilization the PSi‐based substrate into the industry process and thus the development of a Systems‐on‐Chip (SoC).

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