Comparison of the Low-Frequency Noise of Bulk Triple-Gate FinFETs With and Without Dynamic Threshold Operation

Andrade, Maria Gorete Carreira; Martino, João Antônio; Simoen, Eddy; Claeys, Cor

doi:10.1109/led.2011.2166372

Cited by 16 publications

(10 citation statements)

References 8 publications

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“…Fig . 5 shows the oxide trap density (N OT ) and reveals that for Ge FinFETs, the N OT level is around 10 17 ∼ 10 18 cm −3 eV −1 , which is lower than for planar Ge MOSFET devices, which is around 5 × 10 18 cm −3 eV −1 ∼ 3 × 10 19 cm −3 eV −1 [25], [27] and similar to values for Si FinFETs with a similar gate-stack [28]- [30]. Fig.…”

Section: Resultsmentioning

confidence: 60%

Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes

Oliveira

Simoen

Mitard

et al. 2016

IEEE Trans. Electron Devices

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An experimental low-frequency noise (LFN) assessment of long channel Ge pFinFET devices fabricated in different shallow trench isolation (STI) processes is presented, taking into consideration devices with fin widths from 100 nm (planar-like) down to 20 nm. In addition, the correlation among LFN parameters, hole mobility and threshold voltage, is also evaluated. The carrier number fluctuation (N) model is confirmed as dominant mechanism for all studied Ge pFinFETs and there is no correlation with the used STI process. From the LFN, it is evidenced that the Coulomb scattering mobility mechanism plays an important role for STI-first process, resulting in a mobility degradation.

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Section: Resultsmentioning

confidence: 60%

Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes

Oliveira

Simoen

Mitard

et al. 2016

IEEE Trans. Electron Devices

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“…The LF noise origin has been related to either number [14] or mobility fluctuations [15], while the surface roughness of the fin can have a pronounced impact on the noise. Previous noise studies on bulk triple-gate FinFETs have revealed a combination of 1/f-like noise and GR noise to be present in linear operation [3,16], and showing that the flicker noise usually is dominated by the number fluctuations or gate-oxide trapping mechanism. GR noise centers both in the silicon fin and in the gate oxide contribute Lorentzians to the noise spectrum [14].…”

Section: Introductionmentioning

confidence: 99%

“…The study of generation-recombination (GR) centers in Bulk FinFETs is very important for analyzing the data retention [15]. Operating the devices in the dynamic threshold mode, which is beneficial for analog applications, has no consequences for the noise behavior [16].…”

Section: Introductionmentioning

confidence: 99%

Low-frequency noise investigation of n-channel 3D devices

Andrade

Martino

Simoen

et al. 2015

Microelectronic Engineering

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In this paper, the low-frequency (LF) noise in standard n-channel triple-gate Bulk FinFETs has been experimentally investigated with variation in the fin widths (W Fin ), channel lengths (L) and gate dielectric. The origin of the noise will be analyzed in order to understand the physical mechanisms involved in 3D device architectures. Although the device scaling brings the idea of noise reduction, we show the opposite behavior because already single electron trapping has a marked impact on the device operation. Significant variation in the noise spectral density has been observed, which is related to the random occurrence of excess Lorentzian components (1/f 2 -like), associated with generation-recombination (GR) noise. In addition, the gate-voltage-dependent GR noise peaks have been studied, which are assigned to gate oxide traps.

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“…Bulk FinFETs are attractive candidates for sub-22 nm CMOS integration because of the very good short channel effect control due to the multiple-gate architecture, the ideal subthreshold slope, the advantages in terms of cost and defect density of the silicon substrate, heat transfer and compatibility compared with Silicon-on-Insulator (SOI) substrates [1]- [6]. This device can be used for advanced technology node applications such as analog circuits, DTMOS operation and capacitor-less, one-transistor memories like DRAM (Dynamic Random Access Memory) and Floating-Body RAM (FBRAM).…”

Section: Introductionmentioning

confidence: 99%

Floating body effect on n-channel bulk FinFETs for memory application

Andrade

Almeida

Martino

et al. 2014

2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS)

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In this paper, the floating body effect (FBE) is experimentally investigated on triple gate n-channel Bulk FinFETs for 1T-FBRAM (1 transistor Floating Body Dynamic Random Access Memory) application. A difference between the Direct Current (DC) and the Alternating Current (AC) measurements corresponding with the real memory operation is shown. The large hysteresis under DC measurement related to floating body effects is observed using AC measurement only when the bulk contact is floating. Moreover, it is shown that the stored holes are not in the fins but probably in the ground plane below the junctions. Furthermore, the floating body effect in the Bulk FinFET is observed when the latter is operated like a biristor, confirming the charge storage in the junction capacitor.

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Comparison of the Low-Frequency Noise of Bulk Triple-Gate FinFETs With and Without Dynamic Threshold Operation

Cited by 16 publications

References 8 publications

Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes

Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes

Low-frequency noise investigation of n-channel 3D devices

Floating body effect on n-channel bulk FinFETs for memory application

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