2021
DOI: 10.1109/tie.2020.2972442
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Comparison of Thermal Stress During Short-Circuit in Different Types of 1.2-kV SiC Transistors Based on Experiments and Simulations

Abstract: The temperature evolution during a short-circuit in the die of three different Silicon Carbide 1200-V power devices is presented. A transient thermal simulation was performed based on the reconstructed structure of commercially available devices. The location of the hottest point in the device is compared. Finally, the analysis supports the necessity to turn-off short-circuit events rapidly in order to protect the device immunity after a fault.

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Cited by 19 publications
(7 citation statements)
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“…The thicknesses are 4, 3 and 100 μm, respectively. The doping profile of the p well is retrograde, featuring a lower surface doping of 5x10 17 and a maximum doping concentration of 1.8×10 18 𝑐𝑚 -3 at a depth of 0.5 μm, which gradually reduces to 3×10 14 𝑐𝑚 -3 at a depth of 2 μm as shown in Fig. 1(c).…”
Section: Device Structure Modeling and Simulationmentioning
confidence: 95%
See 1 more Smart Citation
“…The thicknesses are 4, 3 and 100 μm, respectively. The doping profile of the p well is retrograde, featuring a lower surface doping of 5x10 17 and a maximum doping concentration of 1.8×10 18 𝑐𝑚 -3 at a depth of 0.5 μm, which gradually reduces to 3×10 14 𝑐𝑚 -3 at a depth of 2 μm as shown in Fig. 1(c).…”
Section: Device Structure Modeling and Simulationmentioning
confidence: 95%
“…• The carrier generation also increases with temperature contributing to the conduction of the device. According to [18], a temperature of more than 1400C is required to generate a carrier concentration of about 3.5x10 15 cm -3 .…”
Section: A Parasitic Thyristor Latching During Steady-statementioning
confidence: 99%
“…The exact temperature distribution across the whole volume of the die depends on the type of device [49] and looks similar for transients and steady state, although with different temperature values [50]. However, the hotspots would be located close to the top surface for SiC MOSFETs and SiC JFETs [49]. Consequently, application of technologies from Fig.…”
Section: Challenges For Oc: Packaging Materialsmentioning
confidence: 99%
“…External power to the GDUs could also enable the use of normally-ON semiconductor devices in the high-power sector. SiC JFETs, for example, even though offering superior robustness [28], switching performance, and low specific onstate resistance [29], have been less favourable choices for power switches in the past, since a loss of GDU power results in a short circuit of the submodule capacitor.…”
Section: A Sources Of Auxiliary Supply Voltagementioning
confidence: 99%