Comprehensive Analysis of Software Countermeasures against Fault Attacks

Theißing, Nikolaus; Merli, Dominik; Smola, M. G.; Stumpf, Frederic; Sigl, Georg

doi:10.7873/date.2013.092

Cited by 14 publications

(7 citation statements)

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“…Fault countermeasures can be implemented at different abstraction levels within a device. Classic redundancy-based countermeasures can be employed, which protect the program flow and guarantee data integrity [44]. These countermeasures can be employed at higher protocol levels or even at the logic level.…”

Section: Surveymentioning

confidence: 99%

(Adversarial) Electromagnetic Disturbance in the Industry

Beckers

Guilley

Maurine

et al. 2023

IEEE Trans. Comput.

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Faults occur naturally and are responsible for reliability concerns. Faults are also an interesting tool for attackers to extract sensitive information from secure chips. In particular, non-invasive fault attacks have received a fair amount of attention. One easy way to perturb a chip without altering it is the so-called Electromagnetic Fault Injection (EMFI). Such attack has been studied in great depth, and nowadays, it is part and parcel of the state-of-the-art. Indeed, new capabilities have emerged where EM experimental benches are used to cryptanalyze chips. The progress of this "field" is fast, in terms of reproducibility, accuracy, and number of use-cases. However, there is too little awareness about such advances. In this paper, we aim to expose the true harmfulness of EMFI (including reproducibility) to enable reasonable security quotations. We also analyze protections (at hardware/firmware/system levels) in light of their efficiency. We characterize the specificity of EM fault injection compared to other injection means (laser, glitch, probing).

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Section: Surveymentioning

confidence: 99%

(Adversarial) Electromagnetic Disturbance in the Industry

Beckers

Guilley

Maurine

et al. 2023

IEEE Trans. Comput.

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“…For the sake of designing countermeasures, several research studies have been conducted based only on a single level of fault characterization, such as Instruction-Set Architecture (ISA) level in [14,15] or RTL [16]. However, because of the incomplete fault model, this could lead to either under-engineer or over-engineer the protections.…”

Section: Institute Of Engineering Univ Grenoble Alpesmentioning

confidence: 99%

“…For the second experiment of Program 1, one might think that duplicating CMP will work as a countermeasure for APSR corruption since instruction duplication could work as a software countermeasure as described in [7,28]. However, it did not as the injection affects two instructions in most cases, which might be related to the microarchitectural possibility to fetch two instructions at the same time.…”

Section: On the Difficulty Of Analyzing The Program Flow Faultsmentioning

confidence: 99%

Cross-layer inference methodology for microarchitecture-aware fault models

Alshaer¹,

Colombier²,

Deleuze³

et al. 2022

Microelectronics Reliability

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“…Such a model provides a theoretical set of faults an attacker could produce. Since performing practical experiments on software countermeasures may require some advanced fault injection means and can be very time-consuming, fault models are also used to perform fault injection simulations (Theissing et al 2013) or formal proofs (Moro, Heydemann, et al 2014). Those simulations help to provide stronger guarantees about the efficiency of the tested countermeasures.…”

Section: Software Countermeasuresmentioning

confidence: 99%

Experimental evaluation of two software countermeasures against fault attacks

Moro

Heydemann

Dehbaoui³

et al. 2014

2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)

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International audienceInjection of transient faults can be used as a way to attack embedded systems. On embedded processors such as microcontrollers, several studies showed that such a transient fault injection with glitches or electromagnetic pulses could corrupt either the data loads from the memory or the assembly instructions executed by the circuit. Some countermeasure schemes which rely on temporal redundancy have been proposed to handle this issue. Among them, several schemes add this redundancy at assembly instruction level. In this paper, we perform a practical evaluation for two of those countermeasure schemes by using a pulsed electromagnetic fault injection process on a 32-bit microcontroller. We provide some necessary conditions for an efficient implementation of those countermeasure schemes in practice. We also evaluate their efficiency and highlight their limitations. To the best of our knowledge, no experimental evaluation of the security of such instruction-level countermeasure schemes has been published yet

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Comprehensive Analysis of Software Countermeasures against Fault Attacks

Cited by 14 publications

References 0 publications

(Adversarial) Electromagnetic Disturbance in the Industry

(Adversarial) Electromagnetic Disturbance in the Industry

Cross-layer inference methodology for microarchitecture-aware fault models

Experimental evaluation of two software countermeasures against fault attacks

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