Comprehensive Survey of FIR-Based Sample Rate Conversion

Zeineddine, Ali; Nafkha, Amor; Paquelet, Stéphane; Moy, Christophe; Jezequel, Pierre Yves

doi:10.1007/s11265-020-01575-6

Cited by 13 publications

(2 citation statements)

References 55 publications

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“…This can be an advantage because it makes an FIR filter inherently stable. Moreover, it is more used in applications requiring linear phases [41], [42]. The main drawback of a digital FIR filter is the time required for the FIR filter to compute all the taps, which defines the system delay between the time a sample enters the system and the time the resulting sample reaches the output (Fig 1a).…”

Section: A Fir Specification Overviewmentioning

confidence: 99%

Novel Digital NGD Methodology for FPGA-Based Embedded Systems

Randriatsiferana,

Lorandel,

Salvador

et al. 2024

IEEE Access

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Negative Group Delay (NGD) is a concept not widely explored in embedded digital signal processing systems, and this study aims to fill this gap. It presents a novel methodology for implementing NGD using second-order Finite Impulse Response (FIR) filter. We include synthesis results that prove the viability of using FIR filters for NGD functions under specific conditions, which involve considering asymmetry coefficients in the time domain. The synthesized results demonstrate the desired time-advance values relative to the input signal frequency, and it is observed that as the normalized advanced-time increases, the normalized frequency also increases. We then design, simulate and test FIR-based NGD parameters before building an FPGA-based proof-of-concept implementation for embedded systems. The experimental results show how the frequency responses of the NGD function at baseband frequency correlate well with the theoretical hypothesis, supporting our analysis and validating our methodology. The NGD principle presented in this paper is potentially useful for group delay correction processes and signal pure delay reduction in embedded digital signal processing systems.

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Section: A Fir Specification Overviewmentioning

confidence: 99%

Novel Digital NGD Methodology for FPGA-Based Embedded Systems

Randriatsiferana,

Lorandel,

Salvador

et al. 2024

IEEE Access

Self Cite

View full text Add to dashboard Cite

show abstract

“…This can be an advantage because it makes an FIR filter inherently stable. Moreover, it is more used in applications requiring linear phases [35], [36]. The main drawback of a digital FIR filter is the time required for the FIR filter to compute all the taps, which defines the system delay between the time a sample enters the system and the time the resulting sample reaches the output (Fig 1a).…”

Section: A Fir Specification Overviewmentioning

confidence: 99%

Digital NGD Circuit Design and Implementation for FPGA-based Embedded System

RANDRIATSIFERANA¹

2023

Preprint

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<p>We present a methodology for implementing NGD using a Finite Impulse Response (FIR) filter. The NGD concept is counter-intuitive in nature, so we first provide the basic theory of FIR-based NGD system synthesis based on second-order FIR systems. We include synthesis results that prove the viability of using FIR filters for NGD functions under specific conditions. We then design, simulate and test FIR-based NGD parameters before building an FPGA-based proof-of-concept implementation for embedded systems. The experimental results show how the frequency responses of the NGD function at baseband frequency correlate well with the theoretical hypothesis, supporting our analysis and validating our methodology. </p>

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