2015 Euromicro Conference on Digital System Design 2015
DOI: 10.1109/dsd.2015.37
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Computing Framework for Dynamic Integration of Reconfigurable Resources in a Cloud

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Cited by 16 publications
(10 citation statements)
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“…The shell contains the common components required by all applications such as communication controllers (PCI end point, network controller, off-chip memory controller), clock management, routing (if multiple vFPGAs are allowed) and reconfiguration management (if dynamic reconfiguration is supported). Researches refer to the static region using different names such as static logic [6], [8], RC2F [5], service layer [9], vendor logic [13], [14], Network Service Layer [28], FPGA hypervisor [7], [12] and shell [10], [11]. The role region is usually a dynamically reconfigurable region [8], [9], [13], [5].…”
Section: Related Workmentioning
confidence: 99%
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“…The shell contains the common components required by all applications such as communication controllers (PCI end point, network controller, off-chip memory controller), clock management, routing (if multiple vFPGAs are allowed) and reconfiguration management (if dynamic reconfiguration is supported). Researches refer to the static region using different names such as static logic [6], [8], RC2F [5], service layer [9], vendor logic [13], [14], Network Service Layer [28], FPGA hypervisor [7], [12] and shell [10], [11]. The role region is usually a dynamically reconfigurable region [8], [9], [13], [5].…”
Section: Related Workmentioning
confidence: 99%
“…Researches refer to the static region using different names such as static logic [6], [8], RC2F [5], service layer [9], vendor logic [13], [14], Network Service Layer [28], FPGA hypervisor [7], [12] and shell [10], [11]. The role region is usually a dynamically reconfigurable region [8], [9], [13], [5]. Some researchers proposed a static role that would be combined with the static logic and synthesized to get the full FPGA bit stream [10], [22].…”
Section: Related Workmentioning
confidence: 99%
“…Most of hardware virtualization schemes are based on the dynamic reconfiguration of the FPGA [4,[9][10][11] . The key idea is to decompose the physical FPGA into several reconfigurable regions using the Dynamic Partial Reconfiguration (DPR).…”
Section: Related Workmentioning
confidence: 99%
“…Additionally, a static region is used to connect all vFPGAs in each physical FPGA to the system manager. Authors in [10] , have proposed an architecture of four vFPGAs with NetFPGA-10G infrastructure in the static region, while in [11] the control unit in the static region communicates with the external host via a PCI-express interface. Moreover, in [4] , authors have proposed a prototype framework (RC3E) for integrating vFPGAs in the cloud using also a DPR technique.…”
Section: Related Workmentioning
confidence: 99%
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