Considerations in the design of a low‐voltage power MOSFET technology

Rutter, P.

doi:10.1049/iet-pel.2019.0284

Cited by 4 publications

(2 citation statements)

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“…The phenomenon can be interpreted as an equivalent series resistance (R oss ) appearing in series to the output capacitance of the devices (C oss ) during the resonant transitions [9][10][11][12][13][14][15][16]. However, there are no similar reports about the soft-switching loss contribution of the secondary side low-voltage (LV) rectifiers, even though the most mature technology for the LV secondary side rectifiers is the Silicon (Si) Trench MOSFET with shield-plate [17][18][19][20][21], and it is known that in their construction a series resistance appears with the output capacitance [22][23][24].…”

Section: Introductionmentioning

confidence: 99%

On the Practical Evaluation of the Switching Loss in the Secondary Side Rectifiers of LLC Converters

et al. 2021

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The switching loss of the secondary side rectifiers in LLC resonant converters can have a noticeable impact on the overall efficiency of the complete power supply and constrain the upper limit of the optimum switching frequencies of the converter. Two are the main contributions to the switching loss in the secondary side rectifiers: on the one hand, the reverse recovery loss (Qrr), most noticeably while operating above the series resonant frequency; and on the other hand, the output capacitance (Coss) hysteresis loss, not previously reported elsewhere, but present in all the operating modes of the converter (under and above the series resonant frequency). In this paper, a new technique is proposed for the measurement of the switching losses in the rectifiers of the LLC and other isolated converters. Moreover, two new circuits are introduced for the isolation and measurement of the Coss hysteresis loss, which can be applied to both high-voltage and low-voltage semiconductor devices. Finally, the analysis is experimentally demonstrated, characterizing the switching loss of the rectifiers in a 3 kW LLC converter (410 V input to 50 V output). Furthermore, the Coss hysteresis loss of several high-voltage and low-voltage devices is experimentally verified in the newly proposed measurement circuits.

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Section: Introductionmentioning

confidence: 99%

On the Practical Evaluation of the Switching Loss in the Secondary Side Rectifiers of LLC Converters

et al. 2021

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“…2-Selection of the nominal load. The design is based upon a single current operation from the entire load range, which may typically correspond to a mid range value so as to save silicon die area and improve light load condition [283]. When optimizing for minimum temperature operation however, the design may be considered for the maximum load current.…”

Section: Design Guidelinesmentioning

confidence: 99%

Prospects of voltage regulators for next generation computer microprocessors

López Julià

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Synchronous buck converter based multiphase architectures are evaluated to determine whether or not the most widespread voltage regulator topology can meet the power delivery requirements of next generation computer microprocessors. According to the prognostications, the load current will rise to 200A along with the decrease of the supply voltage to 0.5V and staggering tight dynamic and static load line tolerances. In view of these demands, researchers face serious challenges to bring forth compliant solutions that can further offer acceptable conversion efficiencies and minimum mainboard area occupancy. Among the most prominent investigation fronts are those surveying fundamental technology improvements aiming at making power semiconductor devices more effective at high switching frequency. The latter is of critical importance as the increase of the switching frequency is fundamentally recognized as the way forward to enhance power density conversion. Provided that switching losses must be kept low to enable the miniaturization of the filter components, one primary goal is to cope with semiconductor and system integration technologies enabling fast dynamic operation of ultra-low ON resistance power switches. This justifies the main focus of this thesis work, centered around a comprehensive analysis of the MOSFET switching behavior in the synchronous buck converter. The MOSFETs dynamic operation, far from being well describable with the traditional clamped inductive hard-switching mode, is strongly influenced by a number of frequently ignored linear and nonlinear parasitic elements that must be taken into account in order to fully predict real switching waveforms, understand their dynamics, and most importantly, identify and quantify the related mechanisms leading to heat generation. This will be revealed from in-depth investigations of the switched converter under fast switching speeds and heavy load. Recognizing the key relevance of appropriate modeling tools that support this task, the second focal point of the thesis aims at developing a number of suitable models for the switching analysis of power MOSFETs. Combined with a series of design guidelines and optimization procedures, these models form the basis of a proposed methodological approach, where numerical computations replace the usually enormous experimental effort to elucidate the most effective pathways towards reducing power losses. This gives rise to the concept referred to as virtual design loop, which is successfully applied to the development of a new power MOSFET technology offering outstanding dynamic and static performance characteristics. From a system perspective, the limits of the power density conversion will be explored for this and other emerging technologies that promise to open up a new paradigm in power integration capabilities.

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