Contact Resistance Reduction Technology Using Aluminum Implant and Segregation for Strained p-FinFETs With Silicon–Germanium Source/Drain

Sinha, Mantavya; Lee, Rinus Tek Po; Chor, Eng Fong; Yeo, Yee-Chia

doi:10.1109/ted.2010.2045682

Cited by 10 publications

(2 citation statements)

References 21 publications

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“…Process details for forming strained p-channel SOI FinFETs (fin height H FIN = 40 nm, fin width W FIN = 40 nm) with 45 nm of raised Si 0.75 Ge 0.25 S/D stressors can be found in [19]- [21]. After deep S/D junction implant and activation, contactformation process comprises ion implantation of Al (at dose of 2 × 10 14 atoms/cm 2 ) and S (at dose of 5 × 10 13 atoms/cm 2 ), both at 10 keV.…”

Section: Device Fabricationmentioning

confidence: 99%

Nickel-Silicide Contact Technology With Dual Near-Band-Edge Barrier Heights and Integration in CMOS FinFETs With Single Mask

Sinha

Chor

Yeo

2010

IEEE Electron Device Lett.

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This letter reports the demonstration of a nickelsilicide contact technology that achieves dual near-band-edge barrier heights (i.e., a low electron barrier height Φ n B for n-FETs and a low hole barrier height Φ p B for p-FETs) using just one additional masking and two ion-implant steps. Independent and effective tuning of contact resistance R C is achieved in both p-and n-FinFETs. The compensation effect of aluminum and sulfur implants is studied for the first time and exploited for process simplification. A novel cost-effective integration scheme is shown to give significant I DSAT enhancement for p-and n-FinFETs.Index Terms-Aluminum (Al) implant, contact resistance, double-species implant, FinFETs, nickel silicide (NiSi), Schottky barrier height, sulfur (S) implant.

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Section: Device Fabricationmentioning

confidence: 99%

Nickel-Silicide Contact Technology With Dual Near-Band-Edge Barrier Heights and Integration in CMOS FinFETs With Single Mask

Sinha

Chor

Yeo

2010

IEEE Electron Device Lett.

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“…Because of the solubility limit of B in silicon, there is little room to further exploit the capacity for SBH regulation using mono-implantation of B [ 11 ]. It has been reported that aluminum (Al) DS can reduce the φ bp value to 0.11 eV in NiSi/p-Si contacts [ 16 , 17 , 18 ] and that indium DS can reduce this value to 0.16 eV [ 19 ]. According to Shannon, a p-type dopant could also be used to tune φ bp in an n-type substrate and vice versa [ 20 ].…”

Section: Introductionmentioning

confidence: 99%

Tuning of Schottky Barrier Height at NiSi/Si Contact by Combining Dual Implantation of Boron and Aluminum and Microwave Annealing

Sun

et al. 2018

Materials

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Dopant-segregated source/drain contacts in a p-channel Schottky-barrier metal-oxide semiconductor field-effect transistor (SB-MOSFET) require further hole Schottky barrier height (SBH) regulation toward sub-0.1 eV levels to improve their competitiveness with conventional field-effect transistors. Because of the solubility limits of dopants in silicon, the requirements for effective hole SBH reduction with dopant segregation cannot be satisfied using mono-implantation. In this study, we demonstrate a potential solution for further SBH tuning by implementing the dual implantation of boron (B) and aluminum (Al) in combination with microwave annealing (MWA). By using such a method, not only has the lowest hole SBH ever with 0.07 eV in NiSi/n-Si contacts been realized, but also the annealing duration of MWA was sharply reduced to 60 s. Moreover, we investigated the SBH tuning mechanisms of the dual-implanted diodes with microwave annealing, including the dopant segregation, activation effect, and dual-barrier tuning effect of Al. With the selection of appropriate implantation conditions, the dual implantation of B and Al combined with the MWA technique shows promise for the fabrication of future p-channel SB-MOSFETs with a lower thermal budget.

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Advanced contact technology

Luo¹,

Jia²

2018

CMOS Past, Present and Future

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Contact Resistance Reduction Technology Using Aluminum Implant and Segregation for Strained p-FinFETs With Silicon–Germanium Source/Drain

Cited by 10 publications

References 21 publications

Nickel-Silicide Contact Technology With Dual Near-Band-Edge Barrier Heights and Integration in CMOS FinFETs With Single Mask

Nickel-Silicide Contact Technology With Dual Near-Band-Edge Barrier Heights and Integration in CMOS FinFETs With Single Mask

Tuning of Schottky Barrier Height at NiSi/Si Contact by Combining Dual Implantation of Boron and Aluminum and Microwave Annealing

Advanced contact technology

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