Control and Optimization of Lattice Converters

Abstract

Multilevel converters continue their upward trend in renewable generation, electric vehicles, and power quality conditioning applications. Despite having satisfactory voltage capabilities, mainstream multilevel converters suffer from poor current sharing performances, thereby leading to the development of lattice converters, i.e., a strong and versatile type of future multilevel power converters. This article addresses two problems faced by lattice converters. First, we propose and detail how to optimize the efficiency of a given lattice converter by controlling the on/off states of H-bridge submodules. Second, we introduce the method that determines the voltage at each node of the converter in order to satisfy output voltage and current requirements. Design and analysis of lattice converters need a different mathematical toolbox than routinely exercised in power electronics. By use of graph theory, this article provides control methods of 3 × 3 and 4 × 4 lattice converters, satisfying various control objectives such as input/output terminals and output voltages. We further validate the methods with simulation results. The methodologies, algorithms, and special cases described in the article will aid further design and refinement of more efficient and easy-to-control lattice converters.

Control and optimization algorithm for lattice power grids with multiple input/output operation for improved versatility

“…To better conceptualize and visualize these connections, we utilize graph theory modeling. With this model, the lattice power grid can be represented as a simple, undirected lattice graph in which each edge represents a module and each node represents an interconnection between two or more modules (Fang, 2021b;Mei et al, 2022;Zhang et al, 2022). Figure 2 depicts a square power grid and its lattice graph representation.…”

“…The fundamental objective of the proposed control and optimization algorithm is to select any two nodes in the lattice (which can serve as input/output ports for electrical loads) and generate a desired voltage and current capacity between them. To generate a voltage of kV dc between two nodes, a path of length l ≥ k modules (edges) must be identified between them (Fang, 2021b;Mei et al, 2022;Zhang et al, 2022). Then, k modules along that path are switched to generate a voltage step of V dc in the desired direction, and the remaining l − k modules in the path are switched to the bypass mode and do not contribute any voltage increase.…”

“…While the aforementioned submodule topologies aim to introduce parallel connectivity on the submodule level, the lattice converter introduces infinitely scalable parallel connectivity through its macro-level topology. The modularity and scalability of multilevel converters are extended into the second and third dimensions by connecting submodules into lattices based on geometric tilings (Fang, 2021b;Mei et al, 2022;Zhang et al, 2022;Fang et al, 2023). Two-dimensional tilings include the three regular tilings (square, triangular, and hexagonal) and the eight Archimedean tilings, and three-dimensional tilings include the cubic and Archimedean honeycombs (Coxeter, 1973;Grünbaum and Shephard, 1977;Weisstein, 2021).…”

“…These lattice converter structures allow for the generation of both high voltages and large currents, both of which can be scaled infinitely by varying the dimensions of the lattice (Fang, 2021b;Fang and Goetz, 2021). The power converter efficiencies of lattice converters have also been investigated through simulation with promising results; 3 × 3 and 4×4 square lattice converters achieved power converter efficiencies of 99.85 and 99.81%, respectively (Mei et al, 2022). Fang et al (2023) recently published experimental demonstrations of a 3 × 3 lattice converter topology, utilizing a dSPACE Microlabbox as a digital controller.…”

“…Stand-alone abilities are also enhanced; multiple loads can be driven at once by a single lattice power grid, or a single load can be driven rapidly and repeatedly by connecting it to multiple ports. Previous designs have only accounted for single input/output operation (Mei et al, 2022;Zhang et al, 2022), or did not account for parallel operation (Fang, 2021b). Thus, the advantages of multiple input/output operation were not accessible under these previous designs.…”