Control over strain relaxation in Si-based heterostructures

Izyumskaya, N.; Avrutin, V.; Vyatkin, A.F.

doi:10.1016/j.sse.2004.01.010

Cited by 13 publications

(2 citation statements)

References 89 publications

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“…An example of an engineered substrate is Si(001) with a "buffer layer" of Si 1-x Ge x grown epitaxially such that the uppermost layer is strain-relaxed Si 1-x Ge x having an in-plane lattice parameter larger than that of bulk Si (1). Much work has been done to understand and control dislocation nucleation and the threading dislocation density in strain-relaxed buffer layers (1,2), and threading dislocation densities in strain-relaxed Si 1-x Ge x (x<0.3) have been reduced to the range of 10 5 -10 7 cm 2 (3). Another example is silicon-on-insulator (SOI) substrates consisting of a thin layer of Si on top of a SiO 2 insulating layer that are fabricated by wafer bonding techniques (4).…”

Section: Introductionmentioning

confidence: 99%

Bonding of Elastically Strain-Relaxed GaAs/InGaAs/GaAs Heterostructures to GaAs(001)

et al. 2008

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Bonding of elastically strain-relaxed GaAs/InGaAs/GaAs heterostructures has been achieved on GaAs(001) substrates by the method of in-place bonding. Pseudomorphic heterostructures were patterned and a sacrificial AlAs layer was removed by selective etching. As etching proceeds and the GaAs/InGaAs/GaAs structure is released from the substrate, elastic strain relaxation occurs and the strain-relaxed structures are weakly bonded in-place to the substrate. The bond between the strain-relaxed structure and the substrate was then strengthened by annealing under conditions similar to those used for whole wafer bonding of GaAs. The degree of strain relaxation of the InGaAs layer is determined by the relative thickness of the GaAs and InGaAs layers. The increase in the in-plane lattice parameter of these bonded GaAs/InGaAs/GaAs structures is 0.3-0.4%.

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Section: Introductionmentioning

confidence: 99%

Bonding of Elastically Strain-Relaxed GaAs/InGaAs/GaAs Heterostructures to GaAs(001)

et al. 2008

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“…14,15 A similar problem has been tackled in the field of SiGe growth on Si substrates, where highly relaxed films with low threading dislocation density are required for device applications. Among many approaches proposed to achieve virtually compliant substrate, 16 the utilization of low-temperature buffer layer saturated with point defects of vacancy type was demonstrated to promote substantially strain relaxation while keeping dislocation density at relatively low level. 17 In this work, we implemented the three-step deposition method on nearly lattice-matched DyScO 3 substrates, in which a compliant interlayer grown at relatively low substrate temperature is sandwiched between a thin nucleation layer and a relatively thick top layer both grown at higher temperature, in order to achieve BST films with low residual strain and high dielectric tunability at microwave frequencies.…”

Section: Introductionmentioning

confidence: 99%

Enhanced microwave dielectric tunability of Ba0.5Sr0.5TiO3 thin films grown with reduced strain on DyScO3 substrates by three-step technique

Liu¹,

Avrutin²,

Zhu³

et al. 2013

Journal of Applied Physics

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Tunable dielectric properties of epitaxial ferroelectric Ba 0.5 Sr 0.5 TiO 3 (BST) thin films deposited on nearly lattice-matched DyScO 3 substrates by radio frequency magnetron sputtering have been investigated at microwave frequencies and correlated with residual compressive strain. To reduce the residual strain of the BST films caused by substrate clamping and improve their microwave properties, a three-step deposition method was devised and employed. A high-temperature deposition at 1068 K of the nucleation layer was followed by a relatively low-temperature deposition (varied in the range of 673-873 K) of the BST interlayer and a high-temperature deposition at 1068 K of the top layer. Upon post-growth thermal treatment at 1298 K the films grown by the three-step method with the optimized interlayer deposition temperature of 873 K exhibited lower compressive strain compared to the control layer (À0.002 vs. À0.006). At 10 GHz, a high dielectric tunability of 47.9% at an applied electric field of 60 kV/cm was achieved for the optimized films. A large differential phase shift of 145 /cm and a figure of merit of 23 /dB were obtained using a simple coplanar waveguide phase shifter at 10 GHz. The low residual strain and improved dielectric properties of the films fabricated using the three-step deposition technique were attributed to reduced clamping of the BST films by the nearly lattice-matched substrate. V

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Deep-level transient spectroscopy analysis of interface defects in Ce:ZnO/p-Si heterostructures

Öztel,

Akçay,

Algün

2024

J Mater Sci: Mater Electron

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This study reports the investigation of the effect of cerium (Ce) dopant concentration on defect levels in Ce-doped ZnO/p-type Si (p-Si) heterojunctions (HJs) by deep-level transient spectroscopy (DLTS). Undoped ZnO (uZnO) and Ce-doped ZnO (Ce:ZnO) were synthesized at different molar ratios using the sol–gel method, and n-Ce:ZnO/p-Si heterojunctions were fabricated on p-Si via spin coating. According to energy dispersive x-ray spectroscopy (EDS) data, no foreign atoms are present in the synthesized nanoparticles. A critical observation is that the oxygen content increases with Ce doping. Scanning electron microscopy (SEM) images revealed uniform spherical grains, with a decrease in grain size as Ce dopant concentration increased. X-ray diffraction (XRD) confirmed a hexagonal wurtzite crystal structure for all nanostructures. I–V measurements documented that the structures have a good rectifying behavior and that the structure exhibiting the best diode character is the Ce:ZnO/p-Si heterostructure containing 2 mol% Ce with an ideality factor of 3.36. DLTS revealed that Ce doping deepened defect levels below the conduction band edge (Ec), with trap level positions calculated as Ec − 0.079, Ec − 0.311, Ec − 0.290, and Ec − 0.386 eV for undoped, 1, 2, and 5 mol% Ce-doped ZnO/p-Si, respectively. The trap concentration decreases with the addition of Ce into the ZnO lattice. The study underlines the tunability of the electrical properties of ZnO/p-Si HJs through Ce doping and the optimizability of their efficiency.

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Control over strain relaxation in Si-based heterostructures

Cited by 13 publications

References 89 publications

Bonding of Elastically Strain-Relaxed GaAs/InGaAs/GaAs Heterostructures to GaAs(001)

Bonding of Elastically Strain-Relaxed GaAs/InGaAs/GaAs Heterostructures to GaAs(001)

Enhanced microwave dielectric tunability of Ba0.5Sr0.5TiO3 thin films grown with reduced strain on DyScO3 substrates by three-step technique

Deep-level transient spectroscopy analysis of interface defects in Ce:ZnO/p-Si heterostructures

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