to new applications arising from the control of single charges and spins on individual dopants in silicon. Promi sing applications are where the donors function as quantum bits (qubits). How ever, configuring materials with arrays of single donor qubits in the solid state is a formidable challenge. It has been proposed that noisy, intermediatescale quantum (NISQ) [1] devices with ≈50-100 qubits can surpass classical supercom puters in executing some specific algo rithms. [2] Even for NISQ devices, the error budgets for the physical qubits are strict, requiring errors well below 1% in order to achieve sufficient circuit depths. Beyond NISQ, errorcorrected, universal quantum processors of the kind necessary to run Shor's factoring algorithm on a 2000 bit classical key will require upwards of 4000 logical qubits. Using a 2D surface code architecture, this would translate to about 200 mil lion physical qubits with present error rates of around 0.1%. [3] Future devices with lower error rates [4] will reduce the required number of physical qubits. The surface code is also able to tolerate 5-10% physically nonfunctional (absent or faulty) qubits in the architecture. [5,6] Silicon chips containing arrays of single dopant atoms can be the material of choice for classical and quantum devices that exploit single donor spins. For example, group-V donors implanted in isotopically purified 28 Si crystals are attractive for large-scale quantum computers. Useful attributes include long nuclear and electron spin lifetimes of 31 P, hyperfine clock transitions in 209 Bi or electrically controllable 123 Sb nuclear spins. Promising architectures require the ability to fabricate arrays of individual near-surface dopant atoms with high yield. Here, an on-chip detector electrode system with 70 eV root-mean-square noise (≈20 electrons) is employed to demonstrate near-room-temperature implantation of single 14 keV 31 P + ions. The physics model for the ion-solid interaction shows an unprecedented upper-bound single-ion-detection confidence of 99.85 ± 0.02% for near-surface implants. As a result, the practical controlled silicon doping yield is limited by materials engineering factors including surface gate oxides in which detected ions may stop. For a device with 6 nm gate oxide and 14 keV 31 P + implants, a yield limit of 98.1% is demonstrated. Thinner gate oxides allow this limit to converge to the upper-bound. Deterministic single-ion implantation can therefore be a viable materials engineering strategy for scalable dopant architectures in silicon devices.The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/adma.202103235.