Copper iodide and oxide semiconductor thin films patterned by spray-spin coating for fabricating complementary inverters: Improving stability with passivation layers

Lee, Kyumin; Oh, Jong Gyu; Kim, Doyeon; Baek, Jisu; Kim, In Ho; Nam, Sooji; Jeong, Yong Jin; Jang, Jaeyoung

doi:10.1016/j.apsusc.2022.155081

Cited by 10 publications

(5 citation statements)

References 46 publications

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“…76-0207). The smaller Zn 2+ (74 pm) with an ionic radius similar to Cu 1+ (77 pm) can fully complement the Cu vacancy [ 23 ]. Since a small amount of Zn 2+ was doped into CuI to fill or compensate for the Cu vacancies, the crystallinity of the material was improved, and the peak was elevated.…”

Section: Resultsmentioning

confidence: 99%

Low-Voltage Solution-Processed Zinc-Doped CuI Thin Film Transistors with NOR Logic and Artificial Synaptic Function

et al. 2023

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Low-voltage Zn-doped CuI thin film transistors (TFTs) gated by chitosan dielectric were fabricated at a low temperature. The Zn-doped CuI TFT exhibited a more superior on/off current ratio than CuI TFT due to the substitution or supplementation of copper vacancies by Zn ions. The Zn-doped CuI films were characterized by scanning electron microscope, X-ray diffraction, and X-ray photoelectron spectroscopy. The Zn-doped CuI TFTs exhibited an on/off current ratio of 1.58 × 104, a subthreshold swing of 70 mV/decade, and a field effect mobility of 0.40 cm2V−1s−1, demonstrating good operational stability. Due to the electric-double-layer (EDL) effect and high specific capacitance (17.3 μF/cm2) of chitosan gate dielectric, Zn-doped CuI TFT operates at a voltage below −2 V. The threshold voltage is −0.2 V. In particular, we have prepared Zn-doped CuI TFTs with two in-plane gates and NOR logic operation is implemented on such TFTs. In addition, using the ion relaxation effect and EDL effect of chitosan film, a simple pain neuron simulation is realized on such a p-type TFTs for the first time through the bottom gate to regulate the carrier transport of the channel. This p-type device has promising applications in low-cost electronic devices, complementary electronic circuit, and biosensors.

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Section: Resultsmentioning

confidence: 99%

Low-Voltage Solution-Processed Zinc-Doped CuI Thin Film Transistors with NOR Logic and Artificial Synaptic Function

et al. 2023

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“…The prepared solution is sprayed while the substrate is rotating inside a spin coater (Figure 5b). K. Lee et al patterned Zn-doped CuI (Zn:CuI) using this method to fabricate p-type TFTs where only γ-phase CuI crystals were grown [62].…”

Section: Spray-spin Coatingmentioning

confidence: 99%

Copper(I) Iodide Thin Films: Deposition Methods and Hole-Transporting Performance

Jamshidi,

Gardner

2024

Molecules

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The pursuit of p-type semiconductors has garnered considerable attention in academia and industry. Among the potential candidates, copper iodide (CuI) stands out as a highly promising p-type material due to its conductivity, cost-effectiveness, and low environmental impact. CuI can be employed to create thin films with >80% transparency within the visible range (400–750 nm) and utilizing various low-temperature, scalable deposition techniques. This review summarizes the deposition techniques for CuI as a hole-transport material and their performance in perovskite solar cells, thin-film transistors, and light-emitting diodes using diverse processing methods. The preparation methods of making thin films are divided into two categories: wet and neat methods. The advancements in CuI as a hole-transporting material and interface engineering techniques hold promising implications for the continued development of such devices.

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“…In addition to the growth of high-quality Te thin films, the development of passivation layers is another factor that can affect the device’s performance with improved stability. Inorganic passivation layers such as Al 2 O 3 and HfO x can protect the channel layer from the penetration of surrounding H 2 O and O 2 molecules owing to their low water vapor permeability. – However, the performance degradation of the TFT device is significantly observed, which can be attributed to the difference in the thermal expansion coefficients (TECs) between the active channel and passivation layers, leading to the thermal expansion mismatch and tensile/compressive strain-induced damages to the device. , Alternatively, organic polymers such as CYTOP and parylene have been widely used as a passivation layer for TFT devices, – where the polymer passivation layer has the advantage of the deposition condition, which is relatively mild; thus, it may reduce the damage caused by the process. Nevertheless, it suffers from a high-water vapor transmission rate which is insufficient to prevent the penetration of moisture present in the air into the channel layer, resulting in the performance degradation of the device .…”

Section: Introductionmentioning

confidence: 99%

Synthesis of a Tellurium Semiconductor with an Organic–Inorganic Hybrid Passivation Layer for High-Performance p-Type Thin Film Transistors

Lim,

Kim,

Park

et al. 2023

ACS Appl. Electron. Mater.

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Development of high-performance p-channel devices is in high demand for implementing complementary metal-oxide semiconductor logic circuits. In this study, we propose a synthetic approach to high-performance p-type tellurium (Te) thin-film transistors (TFTs) passivated with an organic–inorganic hybrid passivation layer. A quasi-two-dimensional Te channel is synthesized by the sputtering system at room temperature, and an organic–inorganic hybrid passivation layer is formed via infiltration of the synthesis process, including diffusion and infiltration of inorganic Al2O3 into an SU-8 polymeric template, resulting in a high-performance p-type Te TFT with a field-effect mobility of 13.6 cm2/(V s), a subthreshold swing of 6.15 V/decade, and a current on–off ratio of 1.35 × 104. The synergistic effect of Al2O3 and SU-8 is systematically analyzed by implementing devices with hybrid passivation layers, enabling a significant improvement in the device performance compared with that of the device passivated with a single Al2O3 layer. Based on the chemical states and Raman response of the proposed structure, the reduction of oxidative Te states and the strain-induced shifts of the Raman modes are shown to attribute to the compensation for the thermal expansion mismatch and the decrease in the strain-induced damage, leading to enhanced device performance with excellent long-term stability over 70 days in the air. Thus, our work demonstrates the great potential of high-performance p-type Te TFTs for future electronic applications.

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Copper iodide and oxide semiconductor thin films patterned by spray-spin coating for fabricating complementary inverters: Improving stability with passivation layers

Cited by 10 publications

References 46 publications

Low-Voltage Solution-Processed Zinc-Doped CuI Thin Film Transistors with NOR Logic and Artificial Synaptic Function

Low-Voltage Solution-Processed Zinc-Doped CuI Thin Film Transistors with NOR Logic and Artificial Synaptic Function

Copper(I) Iodide Thin Films: Deposition Methods and Hole-Transporting Performance

Synthesis of a Tellurium Semiconductor with an Organic–Inorganic Hybrid Passivation Layer for High-Performance p-Type Thin Film Transistors

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