2008 International Interconnect Technology Conference 2008
DOI: 10.1109/iitc.2008.4546956
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Copper Line Resistance Control and Reliability Improvement by Surface Nitridation of Ti barrier Metal

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Cited by 16 publications
(12 citation statements)
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“…The annealing temperature is set at 400 C as thermal evaluations are typically carried out at this temperature. [21][22][23] As pure Cu gate capacitors undergo an electric field exceeding 2.7 MV/cm, the leakage current of the pure Cu gates increases dramatically owing to the large extent of Cu diffusion into SiO 2 during annealing. At 2 MV/cm, the leakage current of the Cu(TiWN x ) 7:30 Â 10 À12 A/cm 2 film is lower than that of the Cu(TiW) (4:12 Â 10 À10 A/cm 2 ), Cu(ReN x ) (1:32 Â 10 À10 A/cm 2 ), 10) Cu(WN) (4:9 Â 10 À9 A/cm 2 ), 8) Cu(Mo) (3:8 Â 10 À8 A/cm 2 ), 7) Cu(RuN x ) (3 Â 10 À10 A/cm 2 ), 9) and pure Cu (1:6 Â 10 À7 A/cm 2 ) films.…”
Section: Fabrication and Analysis Of Cu(tiwn X ) Filmsmentioning
confidence: 99%
“…The annealing temperature is set at 400 C as thermal evaluations are typically carried out at this temperature. [21][22][23] As pure Cu gate capacitors undergo an electric field exceeding 2.7 MV/cm, the leakage current of the pure Cu gates increases dramatically owing to the large extent of Cu diffusion into SiO 2 during annealing. At 2 MV/cm, the leakage current of the Cu(TiWN x ) 7:30 Â 10 À12 A/cm 2 film is lower than that of the Cu(TiW) (4:12 Â 10 À10 A/cm 2 ), Cu(ReN x ) (1:32 Â 10 À10 A/cm 2 ), 10) Cu(WN) (4:9 Â 10 À9 A/cm 2 ), 8) Cu(Mo) (3:8 Â 10 À8 A/cm 2 ), 7) Cu(RuN x ) (3 Â 10 À10 A/cm 2 ), 9) and pure Cu (1:6 Â 10 À7 A/cm 2 ) films.…”
Section: Fabrication and Analysis Of Cu(tiwn X ) Filmsmentioning
confidence: 99%
“…Figure 4(a) shows the I-V curves for the MOS capacitors fabricated by depositing pure Cu, Cu(Ge), and Cu(GeN x ) films atop SiO 2 /Si substrates after annealing at 400 °C for 1 h. The annealing temperature is chosen as 400 °C since thermal evaluations are typically performed at this temperature. [30][31][32] When the electric field strength exceeds 2.7 MV/cm, the leakage current for the pure Cu gates in the capacitors increases markedly owing to a large amount of Cu that diffused through SiO 2 during annealing. At 2 MV/cm, the leakage current of the Cu(GeN x ) film (2.09 © 10 ¹10 A/cm 2 ) is lower than those of the Cu(Ge) (1.86 © 10 ¹8 A/cm 2 ), Cu(WN) (4.9 © 10 ¹9 A/cm 2 ), 11) Cu(MnN) (3.83 © 10 ¹10 A/cm 2 ), 8) Cu(Mo) (3.8 © 10 ¹8 A/cm 2 ), 12) and pure Cu (1.6 © 10 ¹7 A/cm 2 ) films, 10) confirming the Cu(GeN x ) film's excellent thermal stability and confirming its role in barrierless metallization.…”
Section: Resultsmentioning
confidence: 99%
“…Figure 7(a) shows the I-V curves for MOS capacitors fabricated by depositing pure Cu, Cu(Mn), and Cu(MnN x ) films atop SiO 2 /Si substrates after annealing at 400 C for 1 h. The annealing temperature is selected as 400 C since thermal evaluations are typically performed at this temperature. [20][21][22] When the electric field strength exceeds 2.7 MV/cm, the leakage current for the pure Cu gates in the capacitors increases dramatically owing to a large amount of Cu diffusing through SiO 2 during annealing. At 2 MV/cm, the leakage current of the Cu(MnN x ) film (3:83 Â 10 À10 A/cm 2 ) is lower than that of the Cu(Mn) (1:63 Â 10 À8 A/cm 2 ), Cu(WN) (4:9 Â 10 À9 A/cm 2 ), 7) Cu(Mo) (3:8 Â 10 À8 A/cm 2 ), 8) and pure Cu (1:6 Â 10 À7 A/cm 2 ) films, 6) verifying the Cu(MnN x ) film's outstanding thermal stability and qualifying its role in barrierless metallization.…”
Section: Fabrication and Analysis Of Cu(mnn X ) Filmmentioning
confidence: 99%