Correct and non-defensive glue design using abstract models

Abstract

Current hardware design practice often relies on integration of components, some of which may be IP or legacy blocks. While integration eases design by allowing modularization and component reuse, it is still done in a mostly ad hoc manner. Designers work with descriptions of components that are either informal or incomplete (e.g., documents in English, structural but non-behavioral specifications in IP-XACT) or too low-level (e.g., HDL code), and have little to no automatic support for stitching the components together. Providing such support is the glue design problem.This paper addresses this problem using a model-based approach. The key idea is to use high-level models, such as dataflow graphs, that enable efficient automated analysis. The analysis can be used to derive performance properties of the system (e.g., component compatibility, throughput, etc.), optimize resource usage (e.g., buffer sizes), and even synthesize low-level code (e.g., control logic). However, these models are only abstractions of the real system, and often omit critical information. As a result, the analysis outcomes may be defensive (e.g., buffers that are too big) or even incorrect (e.g., buffers that are too small). The paper examines these situations and proposes a correct and nondefensive design methodology that employs the right models to explore accurate performance and resource trade-offs.

On Tokens and Signals: Bridging the Semantic Gap between Dataflow Models and Hardware Implementations

“…The works [10,29] pursue goals similar in spirit to this paper, however, they do not define a formal conformance relation. [10] presents a method for building conservative dataflow models of a specific class of network-on-chip channels.…”

“…Our work aims to be more general, and applicable to general hardware modeled as FSMs. The main focus of [29] is the synthesis of glue, and the notions of correctness and nondefensiveness between models and systems are defined with respect to the glue (e.g., whether buffer sizes estimated by the model are overly pessimistic or optimistic).…”

Characterizing communication behavior of dataflow programs using trace analysis

“…The subclass of statically schedulable programs is amenable to pure compile-time analysis that yields not only a static schedule, but also things such as exact minimal bounds for buffer sizes, exact predictions for throughput and latency, a guarantee of the absence of deadlocks and so forth, see for instance [13], [1]. The input/output behavior of these kinds of dataflow programs has been studied, e.g., in [16], [7], [6]. However, many applications exhibit highly datadependent behavior, such as the decoder in Fig.…”

Static dataflow with access patterns

“…In the example above, C requires that it receive 8 tokens in 8 consecutive clock cycles once it commences firing. CSDF cannot capture this constraint and as a result can lead to incorrect implementations [19].…”

“…To remedy the expressiveness problems of SDF/CSDF, a new model, called SDF with Access Patterns (SDF-AP), is introduced informally in [19]. SDF-AP strikes a balance between the analyzability of SDF/CSDF while accurately capturing the interface timing behavior.…”