Correction for local flare effects approximated with double Gaussian profile in ArF lithography

Osawa, Morimi; Yao, T.; Aoyama, Hajime; Ogino, Kozo; Hoshino, Hiromi; Machida, Yasuhide; Asai, Satoru; Arimoto, Hiroshi

doi:10.1116/1.1629286

Cited by 16 publications

(19 citation statements)

References 8 publications

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“…The systematic component is associated with design-process interactions (proximity effect [80]- [82] lens aberrations [83]- [85] flare [86]- [88]), etching (microloading) [89]- [93] and chemical mechanical polishing (erosion, dishing, etc.) [94]- [98].…”

Section: Systematic Yield Modelsmentioning

confidence: 99%

A Survey of Yield Modeling and Yield Enhancement Methods

Milor

2013

IEEE Trans. Semicond. Manufact.

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Section: Systematic Yield Modelsmentioning

confidence: 99%

A Survey of Yield Modeling and Yield Enhancement Methods

Milor

2013

IEEE Trans. Semicond. Manufact.

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“…Thus, methods for correcting the long range loading effect, microloading effect, and flare were proposed. 34,[42][43][44][45][46][50][51][52][53] In this appendix, these types of correction are called process effect correction.…”

Section: A2 Process Effect Correctionmentioning

confidence: 99%

“…The fundamental idea of CD correction is based on the pattern modulation method 34,[42][43][44][45][46][50][51][52][53] explained in the following. The whole region of LSI patterns on a mask or wafer is divided into small regions L with the size of Á L Â Á L , which are sufficiently smaller than the interaction distance L of the process effect such as the loading effect.…”

Section: A2 Process Effect Correctionmentioning

confidence: 99%

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Abe¹,

Matsumoto

Shibata³

et al. 2009

Jpn. J. Appl. Phys.

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In this paper, a proximity effect correction method for mask fabrication with taking into account resist development processes is proposed. The idea of our method is that the figure size of a developed resist is determined using a suitable function of exposure dose and the normalized deposited energy by backscattering electrons, under the assumption of high acceleration voltage electron beam mask writing. This suitable function should be determined empirically to include the effects of resist development process, and is called development process function in this paper. Methods of deriving the development process function, proximity effect correction equation, and optimum correction dose from the equation are proposed. To check the accuracy of our method, a sample model of development process function is introduced under the condition that the conventional threshold model has an intrinsic error of 8 nm. The method proposed in this paper is found to be able to suppress the correction error of this sample model to less than 1 and 0.2 nm by two and three iterations, respectively. The method proposed in this paper is expected to provide high accuracy proximity effect correction in future mask fabrication.

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“…In optical lithography, the impact of the range over which flare has an influence and the CD variation were measured and corrected for based on experimental data on CD variation and the calculated pattern density in the exposure field. 7 Although flare and its range of influence may be larger in EUVL than in optical lithography, in EUVL the flare can be predicted by measuring the mirror roughness of the projection optics and using that to calculate the power spectral density (PSD). 8 Flare is mainly estimated by the disappearing-resist method (Kirk method 9 ), which involves fitting the PSD calculated from the mirror roughness to the experimental results 10 .…”

Section: Introductionmentioning

confidence: 99%

Flare evaluation for 32-nm half pitch using SFET

Aoyama¹,

Tanaka²,

Kamo³

et al. 2008

SPIE Proceedings

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Flare degrades critical-dimension (CD) control in EUVL, a promising technology for the 32-nm half-pitch node. To deal with flare, high-quality projection optics in the exposure tool and flare variation compensation (FVC) technology with proper mask resizing are needed. Selete has installed a small-field exposure tool (SFET) with the goal of assessing resist performance. Due to the high-quality optics, the SFET allowed us to determine the required flare specification to be 6.1% or 6.6%, as calculated from the residual part of the low-or middle-frequency region, respectively. The flare level was confirmed through experimental results and from calculations using the power spectral density (PSD) obtained from the mirror roughness by the disappearing-resist method. The lithographic performance was evaluated using 32-nm-halfpitch patterns in a new resist. The resist characteristics can be explained by modeling blur as a Gaussian function with a σ of 8.8 nm and using a very accurate CD variation (< ~6 nm) obtained by taking into account the influences of mask CD error and flare on evaluation patterns. Since FVC is needed to obtain flare characteristics that do not degrade the CD, we used the double-exposure method to eliminate the influence of errors, including nonuniform dose distribution and CD mask error. Regardless of whether there was an open area or not, there was no difference in CD as a function of distance up to a distance of 20 µm. In addition, CD degradation was observed at distances not far (< 5 µm) from the open area. In a 60-nm neighborhood of the open area, an 8-nm variation in CD appeared up to the distance at which the CD leveled off. When the influences of resist blur and flare on patterns was taken into account in the calculation, it was found that aerial simulations based on a rigorous 3D model of a mask structure matched the experimental results. These results yield the appropriate mask resizing and the range in which flare has an influence, which is needed for FVC. This research was supported in part by NEDO.

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Correction for local flare effects approximated with double Gaussian profile in ArF lithography

Cited by 16 publications

References 8 publications

A Survey of Yield Modeling and Yield Enhancement Methods

A Survey of Yield Modeling and Yield Enhancement Methods

Proximity Effect Correction for Mask Writing Taking Resist Development Processes into Account

Flare evaluation for 32-nm half pitch using SFET

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