Correction to "A 0.016 mm² 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With &gt;0.95-MHz GBW"

Zhang, Yan; Mak, Pui-In; Law, Man‐Kay; Martins, Rui P.

doi:10.1109/jssc.2013.2254553

Cited by 12 publications

(56 citation statements)

References 7 publications

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“…Of course, the proposed four-stage topology provides higher gain with the same or even less area, but gain and area are parameters not included in the FOMs (area comparison is not meaningful because of the different technologies adopted). From the comparison it appears that, unless for the most recent solution presented in [19] and which shows the best three FOMs, the four-stage design has FOMs comparable, or even higher, than all the other three-stage topologies, and especially those which use only one Miller capacitor [18] and [20], [21], particularly in term of . As a final note, it must be observed that the gain-bandwidth product of the proposed OTA is in the same range as that of OTAs with one less high-impedance node.…”

Section: Experimental Results and Comparisonmentioning

confidence: 97%

“…With the aim of enriching design methodologies for four-stage OTAs while improving performance, an efficient compensation methodology is analyzed and implemented for a high-drive four-stage OTA. The approach extends recent solutions (originally developed for three-stage amplifiers) that adopt only one external Miller capacitor [15]- [20]. In particular, the single Miller capacitor compensation network exploits passive components only, as in [18], [19], and is implemented without using extra transistors, thus saving circuit complexity and power consumption.…”

Section: Introductionmentioning

confidence: 90%

“…The second, third, and fourth stages are basic common source stages implemented through M9-M10, M11-M12, and M13-M14, respectively. Thanks to this simple architecture, the proposed four-stage OTA entails the same ( [14], [15]) or even less ( [18] and [20], [21]) number of transistors of many other reported three-stage amplifiers.…”

Section: Stability and Design Conditionsmentioning

confidence: 99%

“…In particular, we can apply the NMC or RNMC approaches [3], [10], [11], either with or without feedforward stages, and approaches with only one external Miller capacitor [15]- [21]. Moreover, among the latter group, a recently proposed methodology amenable for large capacitive loads, adds left half plane (LHP) zeros in the inner nodes thanks to passive [18], [19] or active components [20].…”

Section: A Multistage Compensation Networkmentioning

confidence: 99%

“…Simulated results are in good agreement with (10) and (16), being the errors lower than 5%. It is worth noting that the compensation with only one Miller capacitor targeted high capacitive loads but it may not ensure stability for load capacitances much lower than the nominal one, as also noted in [20], [21]. To evaluate this behavior, phase margin and gain margin versus load capacitance are plotted in Fig.…”

Section: B Large Signal Analysismentioning

confidence: 99%

See 4 more Smart Citations

High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads

Grasso

Palumbo

Pennisi

2015

IEEE Trans. Circuits Syst. I

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Designing four-stage operational transconductance amplifiers (OTAs) is often considered a challenging task mainly because of the required non trivial frequency compensation procedure. In this study, starting from the simplest architecture (a differential stage cascaded by three common source stages) a high-performance OTA is demonstrated, outperforming all the (few) previous implementations. Thanks to the frequency compensation scheme and to the adoption of a slew-rate enhancer section, the solution is able to drive large capacitive loads as high as 1 nF, rivaling in terms of bandwidth and speed even with three-stage counterparts, traditionally credited to be better because of the less number of high-impedance nodes. The solution, fabricated in a 0.35-technology, occupies 0.014-with DC consumption of 170. It also achieves nearly 3-MHz gain bandwidth product while driving the 1-nF load with less than 0.5-1% settling time.

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Section: Experimental Results and Comparisonmentioning

confidence: 97%

Section: Introductionmentioning

confidence: 90%

Section: Stability and Design Conditionsmentioning

confidence: 99%

Section: A Multistage Compensation Networkmentioning

confidence: 99%

Section: B Large Signal Analysismentioning

confidence: 99%

See 3 more Smart Citations

High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads

Grasso

Palumbo

Pennisi

2015

IEEE Trans. Circuits Syst. I

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Symbolic factorization methodology for multistage amplifier transfer functions

Grasso

Marano

Pennisi

et al. 2015

Circuit Theory & Apps

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Summary In this paper, we discuss a symbolic simplification methodology to derive approximated factorized forms of the transfer function of multistage amplifiers in the complex frequency domain. The developed approach is useful for hand calculation and is also suitable to be implemented in symbolic computer‐aided design tools. Although the proposed methodology is mainly intended for the analysis and design of operational transconductance amplifiers, it can straightforwardly be applied to the small‐signal analysis of any analog linear circuit. Design examples are provided to verify the effectiveness of the proposed approach implemented through a Matlab function. Copyright © 2015 John Wiley & Sons, Ltd.

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Graphical analysis and design of multistage operational amplifiers with active feedback Miller compensation

Tepwimonpetkun

Pholpoke

Wattanapanitch

2015

Circuit Theory & Apps

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Frequency compensation of a multistage operational amplifier (op-amp) is normally performed through solving nodal equations of an equivalent circuit to obtain the op-amp's final transfer function. The process is often very tedious and offers little insight into the roles of the selected compensation scheme. In this paper, we present a graphical design approach for two-stage and three-stage op-amps with active feedback Miller compensation. By viewing frequency compensation as a standard feedback problem, we can utilize the well-known graphical tools such as the root locus and Bode plot to understand the effects of the compensation and to estimate the locations of the closed-loop poles and zeros of the op-amp. Intuitive graphical design procedures for two-stage and three-stage op-amps are also formulated. To show its effectiveness, we illustrate our design approach through the design of a three-stage op-amp in a standard 0.18-μm complementary metal-oxide-semiconductor (CMOS) process. With a load capacitance of 500 pF, post-layout simulations show that the op-amp achieves a low-frequency gain of 144 dB, a phase margin of 58 ∘ , and a unity-gain frequency of 1.38 MHz while consuming a total bias current of 31 μA from a 1.8-V supply voltage. Comparisons with the published amplifiers show that our op-amp achieves the figure of merits comparable to those of the state of the art. outer feedback path between the output nodes of the third and the first gain stages, NMC utilizes 'Miller effect' to split the poles associated with the two high-impedance nodes twice. Because of the presence of right-half-plane (RHP) zeros, the bandwidth limitation, and the high power required to achieve stability in NMC, other NMC-based compensation schemes have been proposed [9][10][11][12][13][14][15][16]. These techniques employ nulling resistors, active feedback, and feedforward transconductance to eliminate the RHP zeros, extend the unity-gain bandwidth, and enhance slew rate of the op-amp. To further extend the bandwidth without extra power consumption, reversed nested-Miller frequency compensation (RNMC) [5,[17][18][19][20][21][22] has been proposed. Instead of forming the inner feedback path between the output nodes of the third and the second gain stages, the inner feedback path is formed between the output nodes of the second and the first gain stages. As will be explained later in this paper, compared with the conventional NMC scheme, this choice of the inner feedback path allows for a higher unity-gain bandwidth in the forward-path transfer function before forming the outer loop. As a result, the overall op-amp can achieve a higher unity-gain bandwidth. When the active feedback technique is used to remove the RHP zeros such as in [18][19][20][21], RNMC is sometimes called reversed active-feedback frequency compensation (RAFFC). Because RAFFC allows for a high unity-gain bandwidth without extra passive resistors, it is the most efficient in terms of power consumption and chip area, thus will be the focus of this paper. Analyses of R...

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Correction to "A 0.016 mm² 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW"

Cited by 12 publications

References 7 publications

High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads

High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads

Symbolic factorization methodology for multistage amplifier transfer functions

Graphical analysis and design of multistage operational amplifiers with active feedback Miller compensation

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