Correlation between gap state density and bias stress reliability of nanocrystalline TFTs comparing with hydrogenated amorphous silicon TFTs

Lee, M.H.; Tai, Chih-Hsuan; Huang, Jung-Jie

doi:10.1016/j.sse.2012.10.006

Cited by 10 publications

(5 citation statements)

References 10 publications

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“…Similar to the approach employed in Reference [23], Equation ( 17) is then smoothed with another piece of surface potential to give a unified regional expression. It may be concluded that with a given V gs and V ds , both the results of the surface and centric potentials can be obtained by starting from an initial physical-based estimate given by Equation (13). As the gate voltage grows towards the threshold, the electric field vanishes near the middle point of the films as implied by Equation ( 9) and thus the centric potential tends to be approximately saturated with the maximum value given by Equation (15).…”

Section: Approximation Of Potentials and Drain Current Modelmentioning

confidence: 99%

“…However, compared with the former, one of main difficulties for modeling DG TFTs rests on the complicated distribution of density of states (DOS) in amorphous silicon (a-Si:H). More recent experimental methods reveal that the deep-level state near the mid-gap exhibits a peak structure distinctly within the a-Si:H OE12; 13 . In that context, the double exponential distribution of DOS, which is widely used in the modeling of a-Si:H TFTs OE14; 15 , makes the model semiempirical.…”

Section: Introductionmentioning

confidence: 99%

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Modeling of current–voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution

Qin

Yao

2015

J. Semicond.

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Accounting for the deep Gaussian and tail exponential distribution of the density of states, a physical approximation for potentials of amorphous silicon thin-film transistors using a symmetric dual gate (sDG a-Si:H TFT) has been presented. The proposed scheme provides a complete solution of the potentials at the surface and center of the layer without solving any transcendental equations. A channel current model incorporating features of gate voltage-dependent mobility and coupling factor is derived. We show the parameters required for accurately describing the current-voltage (I -V ) characteristics of DG a-Si:H TFT and just how sensitively these parameters affect TFT current. Particularly, the parameters' dependence on the I -V characteristics with respect to the density of deep state and channel thickness has been investigated in detail. The resulting scheme and model are successively verified through comparison with numerical simulations as well as the available experimental data.

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Section: Approximation Of Potentials and Drain Current Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Modeling of current–voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution

Qin

Yao

2015

J. Semicond.

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“…In recent years, the need for thin film transistors (TFTs) with high performance has been increasing due to the demand for high order displays with high definition, high contrast ratio, low energy consumption and interactive functionality [1][2][3]. Amorphous silicon (a-Si) TFTs, which is regarded as the most prevailing technology for the commercialization of display products nowadays, is gradually unable to meet the need of above advanced displays because of its poor carrier mobility and high photo-sensitivity [4]. Therefore, a variety of technical solutions have been widely explored to solve the problem of low mobility and poor stability of a-Si TFTs.…”

Section: Introductionmentioning

confidence: 99%

Enhanced electrical stability of thin film transistors based on nanocrystalline silicon films

Xu¹,

Wan²,

Mai³

et al. 2023

Semicond. Sci. Technol.

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In this work, nanocrystalline silicon (nc-Si) films were achieved by using normally processing method of amorphous silica thin film transistors (a-Si TFTs), plasma enhanced chemical vapor deposition (PECVD). The effects of PECVD process parameters on the crystallization rate of nanocrystalline silicon films were comprehensively studied and then an optimized nanocrystalline silicon film has been achieved with a crystallinity of 50.87%. The electrical properties and stability of nc-Si TFTs are further investigated and compared with a-Si TFTs. The ΔVth of the nc-Si TFTs are 0.14 V and -3.32 V under positive bias-temperature-illumination stress (60°C, 30 V, 6000 nit) and negative bias-temperature-illumination stress (60°C, -30 V, 6000 nit) after 1 hour, which are 1.96 V and -5.51 V for a-Si TFT, respectively. The result reveals better photo stability of nc-Si TFTs than a-Si TFTs which is attributed to fewer defect states in nanocrystalline silicon films.

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“…In 1986, based on one-dimensional (1-D) solution of Poisson’s equation, Ahmed et al reported a compact model for accumulation mode poly-Si devices [ 26 ]. Later, plenty of methods, such charge sheet model, effective medium approach (EMA), semi-empirical approach, generation-recombination model, and surface-potential based model, have been introduced for the compact models of the silicon-based TFTs [ 27 , 28 , 29 , 30 , 31 , 32 ]. Then, with the emergence of new TFTs, e.g., OTFT and IGZO TFTs, some excellent compact models based on interesting methods have been developed [ 33 , 34 , 35 , 36 , 37 ].…”

Section: Introductionmentioning

confidence: 99%

A Review for Compact Model of Thin-Film Transistors (TFTs)

Jiang

et al. 2018

Micromachines

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Thin-film transistors (TFTs) have grown into a huge industry due to their broad applications in display, radio-frequency identification tags (RFID), logical calculation, etc. In order to bridge the gap between the fabrication process and the circuit design, compact model plays an indispensable role in the development and application of TFTs. The purpose of this review is to provide a theoretical description of compact models of TFTs with different active layers, such as polysilicon, amorphous silicon, organic and In-Ga-Zn-O (IGZO) semiconductors. Special attention is paid to the surface-potential-based compact models of silicon-based TFTs. With the understanding of both the charge transport characteristics and the requirement of TFTs in organic and IGZO TFTs, we have proposed the surface-potential-based compact models and the parameter extraction techniques. The proposed models can provide accurate circuit-level performance prediction and RFID circuit design, and pass the Gummel symmetry test (GST). Finally; the outlook on the compact models of TFTs is briefly discussed.

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Correlation between gap state density and bias stress reliability of nanocrystalline TFTs comparing with hydrogenated amorphous silicon TFTs

Cited by 10 publications

References 10 publications

Modeling of current–voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution

Modeling of current–voltage characteristics for dual-gate amorphous silicon thin-film transistors considering deep Gaussian density-of-state distribution

Enhanced electrical stability of thin film transistors based on nanocrystalline silicon films

A Review for Compact Model of Thin-Film Transistors (TFTs)

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