Correlation between latent interface trap buildup and 1/f noise in metal–oxide–semiconductor transistors

Abstract

Articles you may be interested inSurface and core contribution to 1/f-noise in InAs nanowire metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 103, 033508 (2013); 10.1063/1.4813850Correlation between the 1 ∕ f noise parameters and the effective low-field mobility in Hf O 2 gate dielectric nchannel metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 85, 1057 (2004); 10.1063/1.1779967 1/f noise in n-channel metal-oxide-semiconductor field-effect transistors under different hot-carrier stresses J. Appl. Phys. 86, 5203 (1999); 10.1063/1.371501 1/f noise measurements on indium antimonide metal-oxide-semiconductor field-effect transistors J. Appl. Phys. 85, 8485 (1999); 10.1063/1.370630 Near interface oxide trap capture kinetics in metal-oxide-semiconductor transistors: Modeling and measurements

Analysis of postirradiation annealing of n-channel power vertical double-diffused metal–oxide–semiconductor transistors

“…22 Another possibility is that H ϩ ions formed during irradiation are captured by oxygen vacancies and represent a gate oxide trapped charge. 4,23 During annealing they are liberated and drift towards the interface. However, the contribution of captured hydrogen ions to ⌬N ot should be relatively small, since it has been shown that almost all oxide trapped charge is EЈ centers.…”

Properties of latent interface-trap buildup in irradiated metal–oxide–semiconductor transistors determined by switched bias isothermal annealing experiments

“…A particularly intriguing possibility is that H ϩ -induced passivation of dopants in the Si surface layer may lead to a switch from buried to surface channel conduction. 4 In such a case, the latent increase in ⌬N it would not necessarily have to come as a consequence of the increase in the actual number of interface traps, but as a result of their increased influence on conduction in the p-channel region of our devices, as the current would move closer to the Si/SiO 2 interface. The reversible exchange of H ϩ between near-interfacial SiO 2 and Si, along with the reversible oxide-trap charge compensation by electrons, 11 may be responsible for rebound in ⌬N ot after the bias switch in Fig.…”

“…2 An interesting possibility is to attribute the LITB to retarded H ϩ transport through SiO 2 and Si and its interactions at or near the Si/SiO 2 interface 3 and/or in the Si surface layer. 4 Commercially processed oxides, as is our case, are plausible candidates for retarded H ϩ transport, during which the H ϩ is captured at traps associated with O vacancies, and released at later annealing times. 3,4 If we take the scenario of interface-trap formation by H ϩ reaction at the interface, we would have essentially the same mechanism as for conventional interface-trap buildup, 6 but slowed down.…”

“…4 Commercially processed oxides, as is our case, are plausible candidates for retarded H ϩ transport, during which the H ϩ is captured at traps associated with O vacancies, and released at later annealing times. 3,4 If we take the scenario of interface-trap formation by H ϩ reaction at the interface, we would have essentially the same mechanism as for conventional interface-trap buildup, 6 but slowed down. A particularly intriguing possibility is that H ϩ -induced passivation of dopants in the Si surface layer may lead to a switch from buried to surface channel conduction.…”

“…The LITB has been observed in several different MOS device types and previous investigations have clarified some details pertinent to this process. [2][3][4][5] Namely, it has a much longer time scale than normal, conventional interface trap buildup, 6 which occurs during and immediately following the irradiation ͑several hours for normal buildup 6 versus several thousand hours for LITB at room temperature͒. 5 During the LITB, the increase in interface traps is accompanied by the decrease in oxide-trap charge.…”