Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard

Sinangil, Mahmut E.; Sze, Vivienne; Zhou, Minhua; Chandrakasan, Anantha P.

doi:10.1109/jstsp.2013.2273658

Cited by 42 publications

(8 citation statements)

References 14 publications

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“…This energy consumption is a critical factor especially in mobile devices, which operate on limited battery capacity. Due to this issue, multiple hardware solutions for ME are found in the literature, such as [17] and [18].…”

Section: Hardware Savings Estimationmentioning

confidence: 99%

Complexity-Aware TZS Algorithm for Mobile Video Encoders

Gonçalvès¹,

Moraes²,

Porto³

et al. 2019

JICS

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Video applications are significantly growing in the last years, especially in embedded/mobile systems. Modern video compression algorithms and standards, such as the High Efficiency Video Coding (HEVC), achieved a high efficiency in compression ratio. However, such efficiency has caused an augment on the complexity to encode videos. This is a serious problem especially in mobile systems, which present restrictions on processing and energy consumption. This paper presents an enhanced Test Zone Search (TZS) algorithm, aiming at complexity reduction of the Motion Estimation (ME) process in the HEVC standard and focusing efficient hardware design for mobile encoders. The proposed algorithm is composed of two strategies: an early termination scheme for TZS, called e-TZS, and the Octagonal-Axis Raster Search Pattern (OARP). When combined and implemented in the HEVC reference encoder, the strategies allowed an average complexity reduction of 75.16% in TZS, with a negligible BD-rate increase of only 0.1242% in comparison to the original algorithm. Besides, the approach presents an average block matching operation reduction of 80%, allowing hardware simplification and decreasing memory access.

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Section: Hardware Savings Estimationmentioning

confidence: 99%

Complexity-Aware TZS Algorithm for Mobile Video Encoders

Gonçalvès¹,

Moraes²,

Porto³

et al. 2019

JICS

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“…To increase parallelism, a highly parallel inter mode decision in HEVC is achieved by dependency removal in [41]. Finally, [35] describes how throughput requirements can be met by processing multiple CUs in parallel, but processing the PU within each CU serially to achieve the same sequential order as in HM. The result shows small block sizes (e.g.…”

Section: Motion Estimationmentioning

confidence: 99%

“…In the literature, various coding tree pruning algorithms are proposed to further reduce the full RDO numbers for computing CU depth [16,26,27,29]. Instead of a hard threshold, a fast CU splitting and pruning scheme based on Bayes decision rules and Gaussian distribution of RD-cost is proposed in [35]. For intra prediction modes, most probable mode (MPM) is derived from neighboring blocks as alternative candidates for full RDO to improve the mode decision quality within the limited number of candidates from rough mode decision [42].…”

Section: Hardware-oriented Two-step Rdo Algorithmmentioning

confidence: 99%

Encoder Hardware Architecture for HEVC

Tsai

Chen

2014

Integrated Circuits and Systems

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In this chapter, an encoder hardware architecture design for HEVC is described. The system pipeline is first introduced followed by the design details of the different HEVC encoder modules such as inter prediction, intra prediction, mode decision, in-loop filters, and entropy coding. Finally, a sample test chip implementation result is presented as a reference. IntroductionHigh density large-sized displays that provide an immersive display experience are being widely adopted in multimedia application terminals. The next generation display panels are expected to be 4K/8K (Ultra High Definition Television (UHDTV) resolution) or even higher. As a result, the video resolution required is also becoming higher. To reduce the storage and transmission requirements of largesized video, HEVC video encoding, that provides around 50 % better compression efficiency than H.264/AVC, is recommended. However, real-time high resolution video encoding in HEVC requires hardware support due to the complexity.The HEVC Test Model (HM) is the reference software for HEVC developed during standardization of HEVC. The HM encoder was designed to maximize the coding gain achievable by HEVC. Real-time performance was not a major objective. The HM encoder can be used for a wide variety of applications including offline encoding [30]. However, the encoding methods in HM do not necessarily map to the most efficient design for a real-time hardware encoder. Hardware consideration is quite different from software and is very challenging. For H.264/AVC, many stateof-the-art H.264/AVC encoder architectures [4,5,18,23,43] have been presented.

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“…In mobile devices, the majority of power consumption is due to video compression [1], especially on ME. Video coding systems remove the temporal redundancy among adjacent frames by using the motion-compensated temporally predictive coding of ME; however, this process has high computational complexity and requires large memory bandwidth [2] in modern video coding design. Many motion estimation algorithms and architectures have been introduced to analyze and solve the problems of computational complexity [3][4] and power consumption [5][6].…”

Section: Introductionmentioning

confidence: 99%

Memory-efficient motion estimation design for mobile multimedia applications

Hsieh

Hung

Hsu

2015

2015 IEEE 5th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)

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In this paper, a novel motion estimation (ME) scheme with efficient memory design is presented for the mobile multimedia applications in H.264/AVC. To obtain the optimal memory usage and achieve better coding quality under volatile system operating conditions, we propose a novel bandwidth rate distortion (B R D) algorithm by exploring the motion activity properties of various video sequences. This scheme allocates the optimized data bandwidth into the corresponding coded block in a rate distortion sense using the convex optimization approach. The experimental results indicate that our proposed B R D ME algorithm can achieve up to 71% bandwidth savings for CIF size video.

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Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard

Cited by 42 publications

References 14 publications

Complexity-Aware TZS Algorithm for Mobile Video Encoders

Complexity-Aware TZS Algorithm for Mobile Video Encoders

Encoder Hardware Architecture for HEVC

Memory-efficient motion estimation design for mobile multimedia applications

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