Counterexample-guided inference of controller logic from execution traces and temporal formulas

Chivilikhin, Daniil; Buzhinskv, Igor; Ulvantsev, Vladimir; Stankevich, A. S.; Shalyto, Anatoly; Vyatkin, Valeriy

doi:10.1109/etfa.2018.8502463

Cited by 3 publications

(7 citation statements)

References 12 publications

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“…An LTL specification can be verified using a model checker tool. In order to take into account liveness properties we use a closed loop [37] verification with formal model of a plant [8].…”

Section: Problem Statementmentioning

confidence: 99%

“…This is countered by greedy guard conditions minimization, but it does not guarantee the result minimality. In [8] fbCSP is extended with a counterexample prohibition procedure similar to [34] to account for LTL properties. Guard conditions are represented with fixed-size conjunctions of positive/negative literals of input variables.…”

Section: Related Workmentioning

confidence: 99%

“…Three algorithms are compared: proposed complete-min-cegis, completecegis (without minimization of N ), and the CEGIS-extension of fbCSP [8]. EFSM-tools [34], BoSy [17] and G4LTL-ST [7] were not considered here, first of all due to poor performance on scenarios only.…”

Section: Case Study: Pick-and-place Manipulatormentioning

confidence: 99%

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fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

Chukharev¹,

Chivilikhin²

2019

Preprint

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Finite-state models are widely used in software engineering, especially in control systems development. Commonly, in control applications such models are developed manually, hence, keeping them up-to-date requires extra effort. To simplify the maintenance process, an automatic approach may be used, allowing to infer models from behavior examples and temporal properties. As an example of a specific control systems development application we focus on inferring finite-state models of function blocks (FBs) defined by the IEC 61499 international standard for distributed automation systems.In this paper we propose a method for FB model inference from behavior examples, based on reduction to Boolean satisfiability problem (SAT). Additionally, we take into account linear temporal properties using counterexample-guided synthesis. In contrast to existing approaches, suggested method is more efficient and produce minimal finite-state models both in terms of number of states and guard conditions. We also present the developed tool fbSAT which implements the proposed method, and evaluate it in two case studies: inference of a finite-state model of a Pick-and-Place manipulator, and reconstruction of randomly generated automata.

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“…An LTL specification can be verified using a model checker tool. In order to take into account liveness properties we use a closed loop [37] verification with formal model of a plant [8].…”

Section: Problem Statementmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

Chukharev¹,

Chivilikhin²

2019

Preprint

Self Cite

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“…Described types of specification, behavior examples and temporal properties, may be combined [5], [6], [26], [28]. Indeed, when searching for a finite-state model of a legacy system based on its behavior examples, it is often helpful to restrict its possible behavior by ensuring its compliance with temporal properties which may be derived from documentation or analysis.…”

Section: Introductionmentioning

confidence: 99%

“…Known methods allowing synthesis of minimal-sized state machines from both behavior examples and temporal properties [5], [6], [26] are based on the use of SAT solvers and counterexample-guided inductive synthesis (CEGIS) [2], [18], [25]. CEGIS is an iterative procedure, in which the model is synthesized from positive and negative examples, where negative examples are produced by verifying candidate models against temporal properties and collecting counterexamples produced by a model checker.…”

Section: Introductionmentioning

confidence: 99%

BeBoSy: Behavior Examples Meet Bounded Synthesis

2021

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Bounded synthesis generates a state machine satisfying given temporal specification in linear temporal logic (LTL) while bounding the number of states of the target solution. Bounded synthesis methods currently do not support finite-length behavior examples, which are often helpful when formulating the specification of the desired state machine. In this work we show how to incorporate behavior examples into bounded synthesis methods and exemplify the approach by presenting BeBoSy (Behavior Examples meet BoSy), an extension of the bounded synthesis tool BoSy based on reductions to Boolean satisfiability (SAT) and Quantified Boolean formula satisfiability (QSAT) problems. The proposed approach is to augment encodings used in BoSy with additional constraints that ensure the compliance of the generated state machine with the given behavior examples. Experiments with openly available data from the annual reactive synthesis competition SYNTCOMP augmented with random behavior examples show that the efficiency of the proposed approach is superior to both BoSy (with naïve representation of behavior examples with LTL formulas) and a state-of-the-art counterexample-guided approach EFSM-tools.

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fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

Chukharev

Chivilikhin

2022

IEEE Access

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Counterexample-guided inference of controller logic from execution traces and temporal formulas

Cited by 3 publications

References 12 publications

fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

BeBoSy: Behavior Examples Meet Bounded Synthesis

fbSAT: Automatic Inference of Minimal Finite-State Models of Function Blocks Using SAT Solver

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