Coupling noise analysis and high frequency design optimization of power/ground plane stack-up in embedded chip substrate cavities

Sankaran, N.; Ramdas, Vinitha; Lee, Baik-Woo; Engin, Ege; Iyer, M.K.; Swaminathan, Madhavan; Tummala, Rao

doi:10.1109/ectc.2008.4550237

Cited by 4 publications

(2 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…2, equals and thus (6) Once the multilayer substrate is reduced to a single layer, traditional design formulas for microstrips with one homogeneous substrate can be used to describe the propagation characteristics of the line. For calculating the resistance and inductance, the original substrate thickness is replaced by the effective height (6).…”

Section: Multilayer Microstrip Modelmentioning

confidence: 99%

“…Little research into the high-frequency characteristics of embedded components has been performed, due to the relatively new technology and the atypical geometries that are involved. Research efforts mainly focus on the influence of the facedown embedding cavities on board interconnects [5], [6] or often concentrate on wafer-level packaging [7], [8]. Palm et al [9], Richter et al [10], and Ohshima et al [11] compare measurements of prototype samples to simulations, but do not propose any circuit models.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Propagation Behavior of Multilayer Microstrips Applied to Interconnects Running Near Embedded Integrated Components

Cauwe

Baets

2010

IEEE Trans. Microwave Theory Techn.

View full text Add to dashboard Cite

This paper presents a simple and accurate model for the multilayer microstrip, which can be easily implemented using closed-form microstrip design formulas. The model is based on two similar approximations that reduce the multilayer substrate to an equivalent single-layer structure. The shunt impedance parameters per unit length are derived from the complex effective dielectric constant, which is obtained using a variational method. A complex image approach results in the calculation of an effective height that can be used to determine the resistance and inductance per unit length. The goal of the modeling is to predict the behavior of tracks running on top of or underneath components embedded in a printed circuit board. The proposed model is compared to quasi-static electromagnetic simulations. A dedicated test vehicle that allows for the direct extraction of the propagation constant of these multilayer microstrips is manufactured and used to verify the model.Index Terms-Circuit model, embedded chip, multilayer microstrip.

show abstract

Section: Multilayer Microstrip Modelmentioning

confidence: 99%