Crack die elimination by comprehensive optimization throughout all assembly process steps

Chin, W L; Tan, C. E.; Shauffi, Norsholiha Mohd

doi:10.1109/iemt.2016.7761943

Cited by 3 publications

(1 citation statement)

References 2 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Trim form adalah proses pemotongan, pembentukan dan pemisahan unit IC dari kerangkanya yang disebut dengan lead frame [3]. Proses trim form yang tidak sempurna dapat mengakibatkan kegagalan mekanik dan cacat pada kemasan IC yang dihasilkan [4][5][6][7][8]. Pada proses pengemasan LQFP diketahui bahwa faktor penyebab cacat kaki komponen adalah proses trim form serta penanganan material yang tidak sempurna [9].…”

Section: Pendahuluanunclassified

Modifikasi Mesin Trim Form Pada Proses Pengemasan Integrated Circuit Untuk Penurunan Damaged Lead

Asaad¹,

Purwanto²

2020

View full text Add to dashboard Cite

Proses pengemasan Integrated Circuit (IC) pada kemasan Low Profile Quad Flat Package (LQFP) membutuhkan mesin trim form untuk pemotongan dambar dan pembentukan kaki IC sebelum dipisahkan dari lead frame. Salah satu urutan proses pada mesin trim form adalah offload yaitu penempatan IC ke dalam tray dengan modul pick and place termasuk didalamnya turn table dengan pergerakan buka tutup untuk menyesuaikan jarak antar kolom dari leadframe sebelum dipindahkan ke tray. Pergerakan buka tutup dari turn table ini berpengaruh terhadap cacat produksi damaged lead. Modifikasi ditujukan untuk deteksi dini misalignment sehingga mesin dapat berhenti otomatis dan mengurangi cacat produksi melalui penambahan dua sensor proximity pada turn table. Hasil penelitian menunjukkan penurunan error pada turn table sebesar 88% dan assembly yield mencapai 99.985% atau terjadi peningkatan sebesar 0.07%.

show abstract

Section: Pendahuluanunclassified

Modifikasi Mesin Trim Form Pada Proses Pengemasan Integrated Circuit Untuk Penurunan Damaged Lead

Asaad¹,

Purwanto²

2020

View full text Add to dashboard Cite

show abstract

Study of Statistical Prevention Mechanism in Integrated Microelectronic Device Manufacturing

Hong

Guo

et al. 2018

2018 International Conference on Electrical Engineering and Informatics (ICELTICs)(44501)

View full text Add to dashboard Cite

Investigation on Die Crack in a Stacked Die Package Using Finite Element Analysis

Talledo¹

2021

JERR

View full text Add to dashboard Cite

Die crack is one of the problems in stacked die semiconductor packages. As silicon dies become thinner in such packages due to miniaturization requirement, the tendency to have die crack increases. This study presents the investigation done on a die crack issue in a stacked die package using finite element analysis (FEA). The die stress induced during the package assembly processes from die attach to package strip reflow was analyzed and compared with the actual die crack failure in terms of the location of maximum die stress at unit level as well as strip level. Stresses in the die due to coefficient of thermal expansion (CTE) mismatch of the package component materials and mechanical bending of the package in strip format were taken into consideration. Comparison of the die stress with actual die crack pointed to strip bending as the cause of the problem and not CTE mismatch. It was found that the die crack was not due to the thermal processes involved during package assembly. This study showed that analyzing die stress using FEA could help identify the root cause of a die crack problem during the stacked die package assembly and manufacturing as crack occurs at locations of maximum stress. The die crack mechanism can also be understood through FEA simulation and such understanding is very important in coming up with robust solution.

show abstract

Crack die elimination by comprehensive optimization throughout all assembly process steps

Cited by 3 publications

References 2 publications

Modifikasi Mesin Trim Form Pada Proses Pengemasan Integrated Circuit Untuk Penurunan Damaged Lead

Modifikasi Mesin Trim Form Pada Proses Pengemasan Integrated Circuit Untuk Penurunan Damaged Lead

Study of Statistical Prevention Mechanism in Integrated Microelectronic Device Manufacturing

Investigation on Die Crack in a Stacked Die Package Using Finite Element Analysis

Contact Info

Product

Resources

About