Creating self-configuring logic with built-in resilience to multiple-upset events

Abstract

Electronic systems are prone to failures, whether during manufacture or throughout their in-service lifetime. A number of design and fabrication techniques are presently employed that maintain an economical production yield. However, the cost of through-life maintenance and fault mitigation operations for complex, high-value systems remains a major challenge and requires new design methods in order to increase their resilience. In this article, the focus is on applications that are sensitive to transient random errors caused by single-event upsets and multiple-bit upsets occurring within their electronic systems and sub-systems, as well as applications that benefit from fault detection and localisation. A novel self-restoration strategy is proposed based on a two-layer design approach comprising a fault-tolerant coordination layer with convergent cellular automata and a configurable functional logic layer. This design strategy is able to self-reconstruct the correct functional logic configuration in the event of transient faults without external intervention. The necessary convergent cellular automata rule set and state table sizes for 3 3 3 and 4 3 4 binary coded patterns are analysed in order to estimate the generic resource requirements for larger designs. Additionally, the possibility of exploiting the design for built-in fault detection and diagnostic reporting is investigated.

A Review of Methods to Study Resilience of Complex Engineering and Engineered Systems

“…Boundary cells to the left and above the active area (i.e., outside the white box) influence the coding of rules and states for the given target pattern; boundary cells to the right and below the active area are determined by the current state and, for the example shown, should always display the combination seen in figure 7h. These boundary cells can therefore given an indication of the presence of fault conditions [77]. Figure 8 shows much larger automata converging towards a specified complex pattern by virtue of its 140 × 60 cells obeying the derived rule set.…”

“…4 To demonstrate the technique, the example configuration of Figure 9b has been extended into a 4 × 4 CCA design and synthesised into a Xilinx Vertex 5 FPGA platform via VHDL. Further details of the specific implementation and fault injection testing platform can be found in [77]. The test case involved subjecting the CCA configuration to one or more faults that result in the functional logic becoming invalid.…”

“…• Scalability: Success of the CCA method depends on deriving efficient rule and state sets that scale favourably for a given pattern size/complexity. The approach adopted in [77] can be used as a model for further investigation.…”

“…• Stuck-at fault detection: while the CCA is intrinsically resilient to transitory error events, persistent stuck-at faults may prohibit convergence to the correct state. One potential solution is to exploit CCA cell state redundancy together with observation of boundary cell state values in order to pinpoint the location of the affected cell [77].…”

Performance-threshold-based resilience analysis of system of systems by considering dynamic reconfiguration

“…Filippini and Silva 24 presented a modeling framework for resilience analysis of critical infrastructures of SoSs based on functional dependencies, and then analyzed the structure and dynamic properties. McWilliam et al 25 presented a two-layer design-based resilience strategy for electronic systems and subsystems by creating self-configuring logic. Ed-Daoui et al 26 used resilience assessment as a foundation for SoSs safety evaluation, and also proposed risk monitoring design and structural analysis approaches.…”