Critical size for the generation of misfit dislocations and their effects on electronic properties in GaAs nanosheets on Si substrate

Abstract

While nanowires and nanosheets (NSs) grown on lattice-mismatched substrates have a number of promising technological applications such as solar cells, generation of misfit dislocations (MFDs) at their interfaces is a major concern for the efficiency of these devices. Here, combined moleculardynamics and quantum-mechanical simulations are used to study MFDs at the interface between a GaAs NS and a Si substrate. Simulation results show the existence of a critical NS thickness, below which NSs are grown free of MFDs. The calculated critical thickness value is consistent with available experimental observations. Charge transfer at the MFD core is found to modify the electronic band profile at the GaAs/Si interface significantly. These effects should have profound impacts on the efficiency of lattice-mismatched NS devices. V

Facile Five-Step Heteroepitaxial Growth of GaAs Nanowires on Silicon Substrates and the Twin Formation Mechanism

“…Our measured period also agrees with the value calculated by Yuan et al . combining molecular-dynamics and quantum-mechanics simulations …”

“…Previous calculations based on continuum elasticity have estimated the critical height and diameter of nanowires for MFD generation and shown considerable stress relief through MFDs. 48,101 The nanowires discussed in this paper fall into this category. As shown in Figure 1d, the distance between two adjacent As atoms in the [11−2] direction is 3.47 Å, and the lattice mismatch is 4.1%, so the period of MFD is 3.47 Å/0.041 = 8.46 nm.…”

“…Our measured period also agrees with the value calculated by Yuan et al combining molecular-dynamics and quantummechanics simulations. 101 To initiate coherent epitaxial growth of GaAs nanowires on Si, previous studies indicate a nucleation or surface treatment step is often required prior to the nanowire growth. For the Aucatalyzed VLS growth, Kang et al found vertical nanowires can be obtained only with high-temperature nucleation followed by low-temperature nanowire growth.…”

Enhanced charge recombination due to surfaces and twin defects in GaAs nanostructures

“…I, TSLs in [111]-oriented III-V semiconductor NWs are commonly associated with {111} sidewall facets. [6][7][8] To simplify the geometry while retaining this key feature, we here simulate a GaAs nanosheet (NS) 39,40 as shown in Fig. 1(b).…”