Crucial integration of high work-function metal gate and high-k blocking oxide on charge-trapping type flash memory device

Abstract

Charge-trapping type flash memory devices with various integrations of metal gates having different work functions and blocking oxides were investigated in this work. Improved erasing speed together with acceptable reliability characteristics can be achieved by the integration of high work-function metal gate and high-k blocking oxide due to an efficient suppression of electron back tunneling through the blocking oxide during erasing operation for the MoN sample. Specifically, the high work-function value of MoN metal gate can be kept only by integrating with the Al2O3 blocking oxide because it can suppress the formation of molybdenum-silicide. Moreover, high-speed erasing can also be demonstrated by combining the MoN metal gate with an HfAlO charge trapping layer when band-to-band hot hole erasing method is adopted.

Performance improvement of metal-Al2O3-HfO2-oxide-silicon memory devices with band-engineered Hf-aluminate/SiO2 tunnel barriers

“…Dry oxidation in an O 2 ambient was used to grow a 3-nm-thick SiO 2 layer. The HA films were subsequently deposited on SiO 2 at 300 C by ALD with TEMAHf (Hf[N(C 2 H 5 )(CH 3 )] 4 ) and TMA (Al(CH 3 ) 3 ) as precursors and O 3 as the oxidant. The composition of the HA films was determined by controlling the number of cycles for HfO 2 and Al 2 O 3 deposition and the exact composition of the HA films was estimated by x-ray photoelectron spectroscopy (XPS).…”

“…CTF devices have been successfully demonstrated as strong candidates for future flash memories. [2][3][4] Although CTF is free from gate coupling, there are still issues such as slow erase speeds and relatively short data retention times. 5,6 To improve the P/E speed of CTF devices, tunnel barrier scaling is essential.…”

Charge-Trapping Non-Volatile Memories

“…Although TaN with a work function of~4.5 eV has been widely accepted, other electrodes such as the MoN with work function of~5.15 eV has been successfully integrated with the dielectric stack (Tsai 2008).…”

Electric-Field Enhancement of a Gate-All-Around Nanowire Thin-Film Transistor Memory

“…Digital Object Identifier 10.1109/LED.2009.2038177 thickness during scaling down results in serious gate injection currents during memory operation [9]. Optimization of the oxide/nitride/oxide stack layers therefore remains critical [10].…”