Cryogenic MOS Transistor Model

Abstract

This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes. The model is developed relying on the 1-D Poisson equation and the drift-diffusion transport mechanism. The validity of the Maxwell-Boltzmann approximation is demonstrated in the limit to 0 K as a result of dopant freezeout in cryogenic equilibrium. Explicit MOS transistor expressions are then derived, including incomplete dopant ionization, bandgap widening, mobility reduction, and interface charge traps. The temperature dependence of the interface trapping process explains the discrepancy between the measured value of the subthreshold swing and the thermal limit at deep-cryogenic temperatures. The accuracy of the developed model is validated by experimental results on long devices of a commercial 28-nm bulk CMOS process. The proposed model provides the core expressions for the development of physically accurate compact models dedicated to low-temperature CMOS circuit simulation. Index Terms-Cryo-CMOS, cryogenic MOSFET, freezeout, incomplete ionization, interface traps, low temperature, MOS transistor, physical modeling. I. INTRODUCTION A DVANCED CMOS processes perform increasingly well from room temperature (RT) down to deep-cryogenic temperatures (<10 K) [1]-[3]. At these temperatures, the ideal switch with a steplike subthreshold slope comes within reach [4]. Furthermore, cryoelectronics [5]-[7] can provide an interface with superconducting devices on the quest for exascale supercomputing [8]. Ultimately, quantum-engineered devices controlled by cryo-CMOS circuits can bring new functionality to existing computing technologies [9], [10]. Large-scale integration of silicon spin qubits [11], [12] and cryo-CMOS control circuits is envisioned to take solid-state quantum computing to the next level [13]. Digital, analog, and RF CMOS circuits [14]-[16] are then required to operate at millikelvin temperatures for initialization, manipulation, and readout of the qubits, as well as error correction [17], [18].

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

“…starting point of the derivation [30]. Drift-diffusion transport has been shown to give an accurate representation of the current down to 4.2 K, and the validity of the Boltzmann statistics has been demonstrated down to millikelvin temperatures [28,27]. Therefore, here we can extend this method to deep-cryogenic temperature operation.…”

“…In the subthreshold region, when E F ≈ E c − 3U T , complete ionization can be assumed under the front gate. This transition from freeze-out to complete ionization due to the applied field can lead to a kink in early depletion [27]. Note that depending on the band bending at the front and back gates in a certain mode of operation, it is possible that the dopants under the front gate are completely ionized but frozen-out under the back gate or vice versa.…”

Theoretical Limit of Low Temperature Subthreshold Swing in Field-Effect Transistors

“…Since n i ∝ T 3/2 exp[−E g /(2k B T )], n i becomes extremely small for k B T W t and (N D /n i ) extremely large. 37 The ones in (15) are then negligible. We obtain:…”

Cryogenic MOSFET Threshold Voltage Model

“…2) Intrinsic Carrier-Density Scaling: The Boltzmann statistics is validated for the deep-cryogenic temperatures [11]. The intrinsic carrier density (n i ) is thus given by the expression with exponential dependence on −E g and 1/T .…”