Cu-In Fine-Pitch-Interconnects with Enhanced Shear Strength

Bickel, Steffen; Hoehne, R.; Panchenko, Iuliana; Meyer, John‐Jules Ch.; Wolf, Marcus

doi:10.1109/ectc.2018.00125

Cited by 7 publications

(3 citation statements)

References 14 publications

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“…In their research, the Cu/In joints revealed remarkable shear strengths, ranging from 45 to 120 MPa [7], which were comparable with the strengths of Cu/Sn interconnects [9]. Accordingly, In was a potential material candidate for low-temperature SLID bonding and thermal interface MPa [7], which were comparable with the strengths of Cu/Sn interconnects [9]. Accordingly, In was a potential material candidate for low-temperature SLID bonding and thermal interface materials [10][11][12][13][14].…”

Section: Introductionmentioning

confidence: 88%

“…Over recent years, pure indium has been successfully employed as a low-temperature soldering material by Panchenko et al, and fine-pitch Cu–In bonding based on the SLID process was carried out at a peak temperature of 170 °C for 2 min [ 5 , 6 , 7 , 8 ]. In their research, the Cu/In joints revealed remarkable shear strengths, ranging from 45 to 120 MPa [ 7 ], which were comparable with the strengths of Cu/Sn interconnects [ 9 ]. Accordingly, In was a potential material candidate for low-temperature SLID bonding and thermal interface materials [ 10 , 11 , 12 , 13 , 14 ].…”

Section: Introductionmentioning

confidence: 99%

“…With regard to the solid-state interfacial reactions between In and Cu, a layer of CuIn 2 was discovered at the interface of sequentially evaporated Cu/In thin films [ 16 , 17 , 18 , 19 , 20 , 21 , 22 ] and as-electroplated Cu/In films [ 6 , 7 , 23 ] at room temperature. Although the CuIn 2 phase was not included in the latest equilibrium Cu–In phase diagram as shown in Figure 1 [ 24 ], its formation in bulk Cu–In [ 25 , 26 ] and Cu–In–S [ 25 , 27 ] alloys after quenching indicated that it is a stable phase at room temperature and is likely formed through the peritectoid reaction between Cu 11 In 9 and In [ 26 ].…”

Section: Introductionmentioning

confidence: 99%

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Long-Term Aging Study on the Solid State Interfacial Reactions of In on Cu Substrate

Hung,

Chang,

Tsai

et al. 2023

Materials

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Indium is considered a candidate low-temperature solder because of its low melting temperature and excellent mechanical properties. However, the solid-state microstructure evolution of In with different substrates has rarely been studied due to the softness of In. To overcome this difficulty, cryogenic broad Ar+ beam ion polishing was used to produce an artifact-free Cu/In interface for observation. In this study, we accomplished phase identification and microstructure investigation at the Cu/In interface after long-term thermal aging. CuIn2 was observed to grow at the Cu/In interface and proved to be a stable phase in the Cu–In binary system. The peritectoid temperature of the Cu11In9 + In → CuIn2 reaction was confirmed to be between 100 and 120 °C. In addition, the growth rate of CuIn2 was discovered to be dominated by the curvature of the reactant Cu11In9/In phase and the temperature difference with the peritectoid temperature. Finally, a comprehensive microstructural evolution mechanism of the Cu/In solid-state interfacial reaction was proposed.

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Section: Introductionmentioning

confidence: 88%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Long-Term Aging Study on the Solid State Interfacial Reactions of In on Cu Substrate

Hung,

Chang,

Tsai

et al. 2023

Materials

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Fine-Pitch Copper Nanowire Interconnects for 2.5/3D System Integration

Bickel,

Quednau,

Birlem

et al. 2024

J. Electron. Mater.

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Heterogeneous integration is a key driver within the field of advanced electronic packaging. The realization of tomorrow’s highly integrated electronic systems depends on the combination and compatibility of various integration technologies at the same hierarchy level. The adoption of novel bonding technologies for a cost-effective realization of multi-chiplet systems is a key aspect. Cu nanowire (NW) interconnects exhibit distinct advantages in terms of their scalability down to a few micrometers, the resulting joint properties and moderate demands with respect to the surface preparation, and the cleanliness of the bonding environment. No solder or flux is required for the bonding process, but the NW bumps still can compensate low height differences. The bonding process can be carried out near room temperature under ambient conditions. We demonstrate the technological possibility to integrate the Cu-NWs for a bump processing scheme including the Cu seed etching on 300 mm wafer for the first time. This paper focuses on the microstructure evaluation and the shear test of the formed Cu-NW interconnects fabricated under ambient conditions within a few seconds. The microstructure analysis shows the intact bonded interconnects and reveals high-resolution details of Cu-NWs. The shear strength of the formed interconnects varies between 4.6 MPa and 90.5 MPa depending on the bonding and annealing conditions. Overall, the results of this study highlight the potential of Cu-NW interconnects for future 3D heterogeneous system integration.

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