Current buffer compensation topologies for LDOs with improved transient performance

2015

Energies

In near-field wireless-powered biomedical implants, the receiver voltage largely overrides the compliance of low-voltage power receiver systems. To limit the induced voltage, generally, low-voltage topologies utilize limiter circuits, voltage clippers or shunt regulators, which are power-inefficient methods. In order to overcome the voltage limitation and improve power efficiency, we propose an integrated chip high-voltage power receiver based on the step down approach. The topology accommodates voltages as high as 30 V and comprises a high-voltage semi-active rectifier, a voltage reference generator and a series regulator. Further, a battery management circuit that enables safe and reliable implant battery charging based on analog control is proposed and realized. The power receiver is fabricated in 0.35-µm high-voltage Bipolar-CMOS-DMOStechnology based on the LOCOS0.35-µm CMOS process. Measurement results indicate 83.5% power conversion efficiency for a rectifier at 2.1 mA load current. The low drop-out regulator based on the current buffer compensation and buffer impedance attenuation scheme operates with low quiescent current, reduces the power consumption and provides good stability. The topology also provides good power supply rejection, which is adequate for the design application. Measurement results indicate regulator output of 4 ± 0.03 V for input from 5 to 30 V and 10 ± 0.05 V output for input from 11 to 30 V with load current 0.01-100 mA. The charger circuit manages the charging of the Li-ion battery through all if the typical stages of the Li-ion battery charging profile.

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Section: High Input Voltage Linear Regulatormentioning

confidence: 97%

Section: High Input Voltage Linear Regulatormentioning

confidence: 97%

Section: High Input Voltage Linear Regulatormentioning

confidence: 99%

Section: High Input Voltage Linear Regulatormentioning

confidence: 99%

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An Integrated Chip High-Voltage Power Receiver for Wireless Biomedical Implants

2015

Energies

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“…The fabricated HV series regulator utilizes cascode compensation, popularly known as Ahuja compensation. This employs Miller compensation with common gate transistor as current buffer that effectively replaces RHP zero with LHP zero providing improved stability (Garimella et al, 2011). The LV-HV transistor cascading scheme (Ballan et al, 1994), is employed for the design of the error amplifier.…”

Section: High Voltage Linear Regulatormentioning

confidence: 99%

High Voltage Integrated Chip Power Recovering Topology for Implantable Wireless Biomedical Devices

Youn

Proceedings of the International Conference on Biomedical Electronics and Devices

2015

In near field wireless power links for biomedical implants, inductive voltage at receiver end (Rx) largely exceeds the compliance of low voltage integrated power recovery circuits. To limit the magnitude of induced signal, most of the low voltage (LV) integrated power recovery schemes employ methods like voltage clipping and shunt regulation. These methods are proved to be power inefficient. Therefore, to overcome the voltage limitation and to improve the power efficiency, we propose an on-chip high-voltage (HV) power recovery scheme based on step-down approach, which allows supply voltage as high as 30V. The proposed design comprises of enhanced semi-active HV bridge rectifier, reference voltage generator and HV series voltage regulator. In addition, a battery management circuit that ensures safe and reliable charging of the implant battery is proposed and implemented. The proposed design is fabricated with 0.35µm HV BCD technology based on LOCOS 0.35µm CMOS process. Rectifier and regulator power efficacy are analyzed and compared through simulation and measurement results.

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Integrated Chip Power Receiver for Wireless Bio-implantable Devices

Biomedical Engineering Systems and Technologies

2015