Current-limiting amplifier for high speed measurement of resistive switching data

Hennen, T.; Wichmann, E.; Elías, Antonio; Lillé, J.; Mosendz, O.; Waser, Rainer; Wouters, Dirk J.; Bedau, D.

doi:10.1063/5.0047571

Cited by 15 publications

(15 citation statements)

References 20 publications

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“…g ., Excel, Origin). Ref presents a commercial integrated circuit for the characterization of crossbar arrays of RS devices; this circuit can overcome the limitations of the SPA in terms of data collection, and a recent study presented a high-speed amplifier capable to measure 10 5 I–V sweeps per second …”

Section: Endurance Characterization Methodsmentioning

confidence: 99%

Standards for the Characterization of Endurance in Resistive Switching Devices

et al. 2021

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Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.

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Section: Endurance Characterization Methodsmentioning

confidence: 99%

Standards for the Characterization of Endurance in Resistive Switching Devices

et al. 2021

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“…The subsequent LRS is strongly affected by the SET voltage (relation 20). This can be attributed to the runaway nature of the SET transition and a higher voltage initial condition, and is also connected with the dynamics of the current limiting circuitry [30]. The LRS value is also strongly correlated with the value of the previous LRS (relation 21), because of the influence of the residual filamentary structure from the previous cycle [62].…”

Section: Resultsmentioning

confidence: 95%

“…Taking advantage of a recently developed electrical measurement technique [30], we systematically fit the model to a dataset that is dense in relevant information about the device state evolution. Together with this new kind of measurement, our modelling approach helps complete a neuromorphic design feedback loop by defining a programmatic connection from the measured behavior of a fabricated device under the intended operating conditions directly to fitted model parameters.…”

Section: Discussionmentioning

confidence: 99%

“…This presents a significant fabrication overhead and limits the materials available for study. In light of these challenges, the input data for the present stochastic model was acquired using a custom measurement technique, introduced in detail in a recent publication [30]. The setup uses an external current-limiting amplifier circuit to allow for collection of sweeping measurements at over six orders of magnitude higher speeds than SMUs, while also eliminating the cumbersome requirement of on-chip current limiting.…”

Section: Data Collectionmentioning

confidence: 99%

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A High Throughput Generative Vector Autoregression Model for Stochastic Synapses

Hennen¹,

Elias²,

Nodin³

et al. 2022

Preprint

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By imitating the synaptic connectivity and plasticity of the brain, emerging electronic nanodevices offer new opportunities as the building blocks of neuromorphic systems. One challenge for largescale simulations of computational architectures based on emerging devices is to accurately capture device response, hysteresis, noise, and the covariance structure in the temporal domain as well as between the different device parameters. We address this challenge with a high throughput generative model for synaptic arrays that is based on a recently available type of electrical measurement data for resistive memory cells. We map this real world data onto a vector autoregressive stochastic process to accurately reproduce the device parameters and their cross-correlation structure. While closely matching the measured data, our model is still very fast; we provide parallelized implementations for both CPUs and GPUs and demonstrate array sizes above one billion cells and throughputs exceeding one hundred million weight updates per second, above the pixel rate of a 30 frames/s 4K video stream.

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“…Usually, current compliances are required to realize unipolar switching modes [51]. In this study, the FWHM of the electrical stimuli is much shorter than state-of-the-art current compliances (often operating at time-scales above 1 µs [60]) and, therefore, the unipolar switching mode can be realized without current compliance.…”

Section: Unipolar Set Kineticsmentioning

confidence: 93%

Intrinsic RESET speed limit of valence change memories

von Witzleben,

Wiefels,

Kindsmüller

et al. 2021

Preprint

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During the last decade, valence change memory (VCM) has been extensively studied due to its promising features, such as a high endurance and fast switching times. The information is stored in a high resistive state (logcial '0', HRS) and a low resistive state (logcial '1', LRS). It can also be operated in two different writing schemes, namely a unipolar switching mode (LRS and HRS are written at the same voltage polarity) and a bipolar switching mode (LRS and HRS are written at opposite voltage polarities). VCM, however, still suffers from a large variability during writing operations and also faults occur, which are not yet fully understood and, therefore, require a better understanding of the underlying fault mechanisms. In this study, a new intrinsic failure mechanism is identified, which prohibits RESET times (transition from LRS to HRS) faster than 400 ps and possibly also limits the endurance. We demonstrate this RESET speed limitation by measuring the RESET kinetics of two valence change memory devices (namely Pt/TaOx/Ta and Pt/ZrOx/Ta) in the time regime from 50 ns to 50 ps, corresponding to the fastest writing time reported for VCM. Faster RESET times were achieved by increasing the applied pulse voltage. Above a voltage threshold it was, however, no longer possible to reset both types of devices. Instead a unipolar SET (transition from HRS to LRS) event occurred, preventing faster RESET times. The occurrence of the unipolar SET is attributed to an oxygen exchange at the interface to the Pt electrode, which can be suppressed by introducing an oxygen blocking layer at this interface, which also allowed for 50 ps fast RESET times.

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Current-limiting amplifier for high speed measurement of resistive switching data

Cited by 15 publications

References 20 publications

Standards for the Characterization of Endurance in Resistive Switching Devices

Standards for the Characterization of Endurance in Resistive Switching Devices

A High Throughput Generative Vector Autoregression Model for Stochastic Synapses

Intrinsic RESET speed limit of valence change memories

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