Current-Mode Filters

Uhrmann, Heimo; Kolm, Robert; Zimmermann, Horst

doi:10.1007/978-3-642-38013-6_6

Cited by 2 publications

(2 citation statements)

References 15 publications

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“…The CMOS design is the most promising, efficient, and good enormous trade-off solution in term of circuit miniaturization. So far, various classical electronic functions as amplifier [3][4], low-voltage signal processor [5], several aspects of filters [6][7][8][9][10][11][12][13][14], PLL [15], transconductors [16], were designed in CMOS technology are available in the literature. Design method of CMOS amplifier with precise and stable DC gain was introduced [3][4].…”

mentioning

confidence: 99%

“…The expected advantages of CMOS technology are the low-power consumption [5][6] and compact [7] circuit design. One of most expanded circuit designs are expected for filters with different characteristics as continuous time [6,9], log-domain [7], AC-powered [8], nanometer technology [10][11][12], enhanced adaptive, Q-tuning scheme [13] and high dynamic range [14] filters. Despite the development of the CMOS design technology of analog circuit, the designability of certain unfamiliar analog functions as the low-pass (LP) negative group delay (NGD) circuits [17][18][19][20] remain one of open questions.…”

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confidence: 99%

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Design and Experimentation of Inductorless Low-Pass NGD Integrated Circuit in 180-nm CMOS Technology

Wan

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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This paper introduces an innovative design of a low-pass (LP) negative group delay (NGD) integrated circuit (IC) in 180-nm CMOS technology. The LP-NGD circuit is an inductorless topology constituted by RC-network with CMOS metal-insulator-metal (MIM) capacitor and poly gate resistor. The design methodology is illustrated by considering the chip layout process. Then, the first run simulation is performed with the design rule check (DRC) and 2.5 mm × 2.2 mm layout versus schematic (LVS) approaches. The feasibility of the CMOS LP-NGD IC circuit implementation is validated with chip-on-board (CoB). The proof of concept (PoC) of the LP-NGD miniaturized circuit was tested in both S-parameter and time-domain. As expected, the calculated, simulated and experimented results of CoB showing NGD of about -10 ns over 12 MHz and -10 dB attenuation is confirmed. Moreover, time-domain investigations were also performed to show the feasibility of generating pulse and arbitrary waveform signal time-advance through the designed and fabricated LP-NGD CoB prototypes.

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