Current problems of high energy application in memory device fabrication

Abstract

We have estimated the problems of high energy application to memory device fabrication in the point of wafer crystalline structure. Following some series of experiments, we have found the different implantation damage induced by the variations of off-cut and azimuth angle of wafer and the difference can be reduced if the tilted wafer is adopted. The using of off-angle wafer also minimize the shadowing effect depended on the tilt angle of implantation because there is no need to use the tilting method in ion implantation process.