Customized binary and multi-level HfO2−x-based memristors tuned by oxidation conditions

He, Weifan; Sun, Huajun; Zhou, Ya-Xiong; Lu, Ke; Xue, Kan‐Hao; Miao, Xiangshui

doi:10.1038/s41598-017-09413-9

Cited by 59 publications

(36 citation statements)

References 51 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…(2) Variability and Stochasticity: RRAM devices exhibit significant variations (across different devices) and stochasticity (in the same device) in their behavior. This is observed as the program/erase threshold voltages (V th +/− ) exhibit stochasticity and variability that in turn depends upon: (1) the initial 'electroforming' or 'breaking-in' step where the filament is formed in a pristine RRAM cell [86]. The program threshold voltage required for creating a filament (or phase change in the bulk) depends upon the compliance current (I CC ) and consequently the range of resistance for the LRS state.…”

Section: Challenges With Emerging Devices As Synapsesmentioning

confidence: 99%

Towards Neuromorphic Learning Machines Using Emerging Memory Devices with Brain-Like Energy Efficiency

Saxena

Srivastava³

et al. 2018

JLPEA

View full text Add to dashboard Cite

The ongoing revolution in Deep Learning is redefining the nature of computing that is driven by the increasing amount of pattern classification and cognitive tasks. Specialized digital hardware for deep learning still holds its predominance due to the flexibility offered by the software implementation and maturity of algorithms. However, it is being increasingly desired that cognitive computing occurs at the edge, i.e., on hand-held devices that are energy constrained, which is energy prohibitive when employing digital von Neumann architectures. Recent explorations in digital neuromorphic hardware have shown promise, but offer low neurosynaptic density needed for scaling to applications such as intelligent cognitive assistants (ICA). Large-scale integration of nanoscale emerging memory devices with Complementary Metal Oxide Semiconductor (CMOS) mixed-signal integrated circuits can herald a new generation of Neuromorphic computers that will transcend the von Neumann bottleneck for cognitive computing tasks. Such hybrid Neuromorphic System-on-a-chip (NeuSoC) architectures promise machine learning capability at chip-scale form factor, and several orders of magnitude improvement in energy efficiency. Practical demonstration of such architectures has been limited as performance of emerging memory devices falls short of the expected behavior from the idealized memristor-based analog synapses, or weights, and novel machine learning algorithms are needed to take advantage of the device behavior. In this article, we review the challenges involved and present a pathway to realize large-scale mixed-signal NeuSoCs, from device arrays and circuits to spike-based deep learning algorithms with ‘brain-like’ energy-efficiency.

show abstract

Section: Challenges With Emerging Devices As Synapsesmentioning

confidence: 99%

Towards Neuromorphic Learning Machines Using Emerging Memory Devices with Brain-Like Energy Efficiency

Saxena

Srivastava³

et al. 2018

JLPEA

View full text Add to dashboard Cite

show abstract

“…(2) Variability and Stochasticity: RRAM devices exhibit significant variations (across different devices) and stochasticity (in the same device) in their behavior. This is observed as the program/erase threshold voltages (V th +/− ) exhibit stochasticity and variability that in turn depends upon: (1) the initial 'electroforming' or 'breaking-in' step where the filament is formed in a pristine RRAM cell [49]. The program threshold voltage required for creating a filament (or phase change in the bulk) depends upon the compliance current (I CC ) and consequently the range of resistance for the LRS state.…”

Section: Challenges With Emerging Devices As Synapsesmentioning

confidence: 99%

“…(3) Resolution and Retention: Experimental studies have shown that it can be challenging to obtain stable weights for more than a single-bit resolution in RRAMs, especially without applying compliance current. In some studies, multi-level resistance in oxide-based memristive devices has been observed by fine tuning the device fabrication and/or electrical pulses for program and erase [49,50]. The analog state retention in actual crossbar circuit configuration is presently being studied [50].…”

Section: Challenges With Emerging Devices As Synapsesmentioning

confidence: 99%

Towards Neuromorphic Learning Machines using Emerging Memory Devices with Brain-like Energy Efficiency

Saxena¹,

Wang²,

Srivastava³

et al. 2018

Preprint

View full text Add to dashboard Cite

The ongoing revolution in Deep Learning is redefining the nature of computing that is driven by the increasing amount of pattern classification and cognitive tasks. Specialized digital hardware for deep learning still holds its predominance due to the flexibility offered by the software implementation and maturity of algorithms. However, it is being increasingly desired that cognitive computing occurs at the edge, i.e. on hand-held devices that are energy constrained, which is energy prohibitive when employing digital von Neumann architectures. Recent explorations in digital neuromorphic hardware have shown promise, but offer low neurosynaptic density needed for scaling to applications such as intelligent cognitive assistants (ICA). Large-scale integration of nanoscale emerging memory devices with Complementary Metal Oxide Semiconductor (CMOS) mixed-signal integrated circuits can herald a new generation of Neuromorphic computers that will transcend the von Neumann bottleneck for cognitive computing tasks. Such hybrid Neuromorphic System-on-a-chip (NeuSoC) architectures promise machine learning capability at chip-scale form factor, and several orders of magnitude improvement in energy efficiency. Practical demonstration of such architectures has been limited as performance of emerging memory devices falls short of the expected behavior from the idealized memristor-based analog synapses, or weights, and novel machine learning algorithms are needed to take advantage of the device behavior. In this work, we review the challenges involved and present a pathway to realize ultra-low-power mixed-signal NeuSoC, from device arrays and circuits to spike-based deep learning algorithms, with ‘brain-like’ energy-efficiency.

show abstract

“…Based on the history of the applied bias, the memristors are switched between high-resistive state (HRS) and low-resistive state (LRS) by the modulation of the resistance of the active layer. For the active layers, many different material candidates have been investigated such as TiO 2 , HfO 2 , NbO 2 , TaO x , ZnO and Al 2 O 3 [11][12][13][14][15]. Also, for the formation of oxide active layers, deposition methods such as sputtering and anodizing have been utilized [16][17][18][19].…”

Section: Introductionmentioning

confidence: 99%

The Effect of Multi-Layer Stacking Sequence of TiOx Active Layers on the Resistive-Switching Characteristics of Memristor Devices

et al. 2020

View full text Add to dashboard Cite

The oxygen vacancies in the TiOx active layer play the key role in determining the electrical characteristics of TiOx–based memristors such as resistive-switching behaviour. In this paper, we investigated the effect of a multi-layer stacking sequence of TiOx active layers on the resistive-switching characteristics of memristor devices. In particular, the stacking sequence of the multi-layer TiOx sub-layers, which have different oxygen contents, was varied. The optimal stacking sequence condition was confirmed by measuring the current–voltage characteristics, and also the retention test confirmed that the characteristics were maintained for more than 10,000 s. Finally, the simulation using the Modified National Institute of Standards and Technology handwriting recognition data set revealed that the multi-layer TiOx memristors showed a learning accuracy of 89.18%, demonstrating the practical utilization of the multi-layer TiOx memristors in artificial intelligence systems.

show abstract

Customized binary and multi-level HfO2−x-based memristors tuned by oxidation conditions

Cited by 59 publications

References 51 publications

Towards Neuromorphic Learning Machines Using Emerging Memory Devices with Brain-Like Energy Efficiency

Towards Neuromorphic Learning Machines Using Emerging Memory Devices with Brain-Like Energy Efficiency

Towards Neuromorphic Learning Machines using Emerging Memory Devices with Brain-like Energy Efficiency

The Effect of Multi-Layer Stacking Sequence of TiOx Active Layers on the Resistive-Switching Characteristics of Memristor Devices

Contact Info

Product

Resources

About