2023
DOI: 10.1109/lmwc.2022.3216019
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D-Band × 8 Frequency Multiplier Using Complementary Differential Frequency Doubler

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Cited by 9 publications
(2 citation statements)
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“…Table 2 compares the present D-band frequency multiplier with those reported for different transistor technologies [32], [33], [34], [35], [36], [37], [38], [39], [40], [41], [42], [43], [44], [45], [46], [47], [48], [49], [50], [51]. It can be seen that this work not only is the first D-band frequency multiplier based on the GaN HEMT technology, but also has the highest output power and the lowest fundamental leakage among all D-band frequency multipliers of any transistor technology.…”
Section: Discussionmentioning
confidence: 99%
“…Table 2 compares the present D-band frequency multiplier with those reported for different transistor technologies [32], [33], [34], [35], [36], [37], [38], [39], [40], [41], [42], [43], [44], [45], [46], [47], [48], [49], [50], [51]. It can be seen that this work not only is the first D-band frequency multiplier based on the GaN HEMT technology, but also has the highest output power and the lowest fundamental leakage among all D-band frequency multipliers of any transistor technology.…”
Section: Discussionmentioning
confidence: 99%
“…8체배기를 제외한 수신 칩의 구조는 참고문헌 [6]에서 기발표한 결과와 그 림 2(b)는 8체배기의 회로도를 보여준다. 8체배기는 단일-차동 구조의 트랜스포머와 다중 위상 필터(poly phase filter) 기반의 상보형 차동 4체배기와 2체배기 구조로 설 계되었다 [7], [8] .…”
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