DAC linearity improvement with layout technique using magic and latin squares

Yao, Dongmei; Sun, Yifei; Higashino, Masashi; Mohyar, S. N.; Yanagida, Tomonori; Arafune, Takuya; Tsukiji, Nobukazu; Kobayashi, Haruo

doi:10.1109/ispacs.2017.8266552

Cited by 8 publications

(2 citation statements)

References 7 publications

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“…We proposed to use Magic Square, Latin Square and Euler Knight Tour as unit cell selection order algorithms of 2D pseudo random number sequences to cancel systematic mismatch effects among unit cells of a unary DAC and improve its linearity (Fig. 17) [46,47,48]. We proposed a unit cell mismatch scrambling method for a high-resolution unary DAC based on virtual 3D layout, to improve its Spurious Free Dynamic Range (SFDR) [50].…”

Section: Dac Linearity Improvement Algorithm With Unit Cell Sorting B...mentioning

confidence: 99%

How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area

KOBAYASHI

2024

IEICE Trans. Fundamentals

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This article reviews the author's group research achievements in analog/mixed-signal circuit and system area with introduction of how they came up with the ideas. Analog/mixed-signal circuits and systems have to be designed as well-balanced in many aspects, and coming up ideas needs some experiences and discussions with researchers. It is also heavily dependent on researchers. Here, the author's group own experiences are presented as well as their research motivations.

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Section: Dac Linearity Improvement Algorithm With Unit Cell Sorting B...mentioning

confidence: 99%

How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area

KOBAYASHI

2024

IEICE Trans. Fundamentals

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“…In a similar manner, the simulation results in Figs. 16 20 is the superposition of the ones in Figs. 15, 17, while the waveform in Fig.…”

Section: Operation and Simulationmentioning

confidence: 99%

Relaxation DAC with positive and negative polarity output using high-pass filter

Nengvang

Katayama

Kuwana

et al. 2023

IEICE Electron. Express

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This letter presents a relaxation digital-to-analog converter (ReDAC) configuration with positive and negative polarity output with high pass filter (HPF). Its digital input is provided in two's complement format, to which the proposed ReDAC configuration directly matches. The configuration and principle are shown and the operation has been verified with SPICE simulation. The proposed ReDAC with HPF is an extension of the conventional ReDAC using low-pass filter (LPF) which generates an analog output with only positive polarity.

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Combinatorial Cryptography and Latin Squares

Zolfaghari

Bibak²

2022

Signals and Communication Technology

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DAC linearity improvement with layout technique using magic and latin squares

Cited by 8 publications

References 7 publications

How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area

How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area

Relaxation DAC with positive and negative polarity output using high-pass filter

Combinatorial Cryptography and Latin Squares

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