Daily scheduling of multi-pass lots at assembly and test facilities

Bard, Jonathan F.; Gao, Zhufeng; Chacon, Rodolfo; Stuber, John

doi:10.1080/00207543.2012.758393

Cited by 11 publications

(11 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The full version of the AT model includes lot sequencing, changeovers, an accounting of lots running at time zero, multiple passes in a route and a range of temperature options for machine set-ups (see Bard et al 2013). Solutions are obtained with a GRASP, which, for convenience, is referred to as the 'optimization' approach in the remaining sections.…”

Section: Basic Planning Modelmentioning

confidence: 99%

“…Nevertheless, even with these simplifications the corresponding MIP requires a large amount of notation, and from a practical point of view, it is intractable. To find solutions, we use a modified version of the GRASP described in Bard et al (2013). The notation and basic AT model follows.…”

Section: Basic Planning Modelmentioning

confidence: 99%

“…In a follow-on paper, Bard et al (2013) present an updated methodology for dealing with the multipass requirements associated with a route. Whether more than one operation is actually scheduled, though, depends on customer demand, the relative priority of the lots in queue and the current configuration of the facility.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Integrating optimisation and simulation approaches for daily scheduling of assembly and test operations

Bard

Jia

Chacon

et al. 2014

International Journal of Production Research

Self Cite

View full text Add to dashboard Cite

The purpose of this paper is to show how the results of an optimisation model that can be integrated with the decisions made within a simulation model to schedule back-end operations in a semiconductor assembly and test facility. The problem is defined by a set of resources that includes machines and tooling, process plans for each product and the following four hierarchical objectives: minimise the weighted sum of key device shortages, maximise weighted throughput, minimise the number of machines used and minimise the makespan for a given set of lots in queue. A mixed integer programming model is purposed and first solved with a greedy randomised adaptive search procedure (GRASP). The results associated with the prescribed facility configuration are then fed to the simulation model written in AutoSched AP. However, due to the inadequacy of the options built into AutoSched, three new rules were created: the first two are designed to capture the machine set-up profiles provided by the GRASP and the third to prioritise the processing of hot lots containing key devices. The computational analysis showed that incorporating the set-up from the GRASP in dynamic operations of the simulation greatly improved its performance with respect to the four objectives.

show abstract

Section: Basic Planning Modelmentioning

confidence: 99%

Section: Basic Planning Modelmentioning

confidence: 99%

See 1 more Smart Citation

Integrating optimisation and simulation approaches for daily scheduling of assembly and test operations

Bard

Jia

Chacon

et al. 2014

International Journal of Production Research

Self Cite

View full text Add to dashboard Cite

show abstract

“…In a follow-on paper, Bard, Gao, Chacon, and Stuber (2013) presented an enhanced methodology for dealing with changeovers, setups at time zero, and the multi-pass requirements associated with a route. To decide on the best machine-tooling configurations and how to assign lots to machines, a three-phase heuristic was implemented.…”

Section: Introductionmentioning

confidence: 99%

Improving performance of dispatch rules for daily scheduling of assembly and test operations

Jia

Bard

Chacon

et al. 2015

Computers & Industrial Engineering

Self Cite

View full text Add to dashboard Cite

“…These multiple-chip products (MCPs) require repetitive visits to assembly stages several times and machines undergo frequent setup changes to process different types of MCPs [6]. Since utilization of assembly stages in packaging facilities decreases due to the significant setup change time, research on scheduling packaging facilities is gaining increased attention [6]- [12]. Packaging of semiconductors typically includes wafer mount, wafer saw, die attach (DA), cure, wire bond (WB), and inspection processes [13].…”

Section: Introductionmentioning

confidence: 99%

Setup Change Scheduling for Semiconductor Packaging Facilities Using a Genetic Algorithm With an Operator Recommender

Chung

Lim

Park

et al. 2014

IEEE Trans. Semicond. Manufact.

View full text Add to dashboard Cite

Semiconductor manufacturers are increasingly assembling multiple chips into a single package to maximize the capacity of flash memories. Multiple-chip products (MCPs) require repetitive visits to assembly stages and incur frequent setup changes. As utilization of packaging facilities decreases due to the introduction of MCPs, research on scheduling of packaging facilities is becoming more important than ever. In this paper, we propose a novel framework to find a good schedule for semiconductor packaging facilities by focusing on bottleneck stages while satisfying practical operational constraints. A genetic algorithm-based sequence optimizer is employed, and construction and performance evaluation of a schedule are separately addressed by a simulator. Furthermore, a recommender is proposed to accelerate convergence of the optimizer. Experimental results show that the proposed approach performs better than the other existing methods while successfully reducing computation time.Index Terms-Flexible job shop scheduling, genetic algorithm, recommendation, semiconductor packaging, sequence dependent setup.

show abstract

Daily scheduling of multi-pass lots at assembly and test facilities

Cited by 11 publications

References 18 publications

Integrating optimisation and simulation approaches for daily scheduling of assembly and test operations

Integrating optimisation and simulation approaches for daily scheduling of assembly and test operations

Improving performance of dispatch rules for daily scheduling of assembly and test operations

Setup Change Scheduling for Semiconductor Packaging Facilities Using a Genetic Algorithm With an Operator Recommender

Contact Info

Product

Resources

About