Dark-field optical fault inspection of ∼10 nm scale room-temperature silicon single-electron transistors

Abstract

Dark-field (DF) optical microscopy, combined with optical simulation based on modal diffraction theory for transverse electric (TE) polarized white light, is shown to provide non-invasive, sub-wavelength geometrical information for nanoscale etched device structures. Room temperature (RT) single electron transistors (SETs) in silicon, defined using etched ~10 nm point-contacts (PCs) and in-plane side gates, are investigated to enable fabrication fault detection. Devices are inspected using scanning electron microscopy (SEM), bright-field (BF) and DF imaging. Compared to BF, DF imaging enhances contrast from edge diffraction by ×3.5. Sub-wavelength features in the RT SET structure lead to diffraction peaks in the DF intensity patterns, creating signatures for device geometry. These features are investigated using a DF line scan optical simulation approximation of the experimental results. Dark field imaging and simulation are applied to three types of structures, comprising successfully-fabricated, over-etched and interconnected PC/gate devices. Each structure can be identified via DF signatures, providing a non-invasive fault detection method to investigate etched nanodevice morphology.