DC and RF characteristics of double recessed anddouble pulse doped AlInAs/GaInAs/InP HEMTs

Hur, Kahyun; McTaggart, R.A.; Miller, Andreas; Hoke, W. E.; Lemonias, P.J.; Aucoin, L.

doi:10.1049/el:19950063

Cited by 12 publications

(2 citation statements)

References 8 publications

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“…The standard way of improving the breakdown voltage in GaAs-based PHEMT's was to adopt a double recessed channel structure by including an extra recess step prior to the gate recess [2]. The same concept has been applied to InP-based HEMT's successfully in increasing the breakdown voltage [3], [4].…”

Section: Introductionmentioning

confidence: 99%

High performance fully selective double recess InAlAs/InGaAs/InP HEMTs

Wang

Liu

Hwang

et al. 2000

IEEE Electron Device Lett.

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InP HEMT's with double recess 0.12 m gate have been developed. The material structure was designed to be fully selective etched at both recess steps for improved uniformity and yield across the whole wafer. Devices demonstrated dc characteristics of extrinsic transconductances of 1000 mS/mm, maximum current density of 800 mA/mm and gate-drain reverse breakdown voltages of 7.8 V. Power measurements were performed at both 20 GHz and 60 GHz. At 20 GHz, the 6 75 m devices yielded 65% maximum power added efficiency(PAE) with associated gain of 13.5 dB and output power of 185 mW/mm. When tuned for maximum output power, it gave an output power density of 670 mW/mm with 15.6 dB gain and 49% PAE. At 60 GHz, maximum PAE of 40% has been measured with associated output power density of 290 mW/mm and gain of 7.4 dB. This represents the best power performance reported for InP-based double recess HEMT's. Index Terms-Microwave power FET's, millimeter wave power FET's, MODFET's.

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Section: Introductionmentioning

confidence: 99%

High performance fully selective double recess InAlAs/InGaAs/InP HEMTs

Wang

Liu

Hwang

et al. 2000

IEEE Electron Device Lett.

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“…1,2 On the contrary, large side etching can enhance BV and suppress g o , but it simultaneously causes an increase in parasitic resistance, resulting in degradation of extrinsic transconductance. 3,4 Because the gate grooves are usually symmetric, a trade-off concerning the width of side etching has to be made in accordance with the specific requirements of a device. Asymmetrically recessed gates, whose side etching is small on the source side and large on the drain side, make it possible to take full advantage of the superior transport properties and the resulting excellent high frequency performance of MODFETs.…”

Section: Introductionmentioning

confidence: 99%