DC and RF Performance of AlN/GaN MOS-HEMTs

Taking, S.; MacFarlane, D.; Khokhar, Ali Z.; Dabiran, A. M.; Wasige, Edward

doi:10.1587/transele.e94.c.835

Cited by 9 publications

(5 citation statements)

References 12 publications

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“…There is no inherent 2DEG channel at the AlGaN/GaN interface in this structure as the AlGaN thickness is below that required for 2DEG formation [9]. For 25% Al-content, the critical thickness beyond which 2DEG forms is around 6 nm [4], [10]. Devices with high positive threshold voltages and high current operation have been demonstrated.…”

Section: Introductionmentioning

confidence: 91%

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A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

Brown

MacFarlane

Al-Khalidi

et al. 2014

IEEE Electron Device Lett.

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A new high-performance normally-off gallium nitride (GaN)-based metal-oxide-semiconductor high electron mobility transistor that employs an ultrathin subcritical 3 nm thick aluminium gallium nitride (Al 0.25 Ga 0.75 N) barrier layer and relies on an induced two-dimensional electron gas for operation is presented. Single finger devices were fabricated using 10 and 20 nm plasma-enhanced chemical vapor-deposited silicon dioxide (SiO 2 ) as the gate dielectric. They demonstrated threshold voltages (V th ) of 3 and 2 V, and very high maximum drain currents (I DSmax ) of over 450 and 650 mA/mm, at a gate voltage (V GS ) of 6 V, respectively. The proposed device is seen as a building block for future power electronic devices, specifically as the driven device in the cascode configuration that employs GaN-based enhancement-mode and depletion-mode devices.

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Section: Introductionmentioning

confidence: 91%

“…Single finger 100 µm wide devices were fabricated to test the device concept using process modules from our earlier work [10]. The source/drain Ohmic contacts were formed by photolithography, metal deposition (Ti/Al/Ni/Au, 30nm/180nm/40nm/100nm) and lift-off.…”

Section: Device Structure and Fabricationmentioning

confidence: 99%

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

Brown

MacFarlane

Al-Khalidi

et al. 2014

IEEE Electron Device Lett.

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“…The effective gate capacitance has a value close to that of the internal gate-source capacitance C gs in the small-signal model extracted from the two-port Y-parameters obtained through conversion of the deembedded s-parameters for our devices. Comparable values for C gs in the range from 3.0 × 10 −7 F cm −2 to 12 × 10 −7 F cm −2 were reported for GaN HFETs [8,[22][23][24][25][26].…”

Section: Discussionmentioning

confidence: 53%

Plasmon-controlled optimum gate bias for GaN heterostructure field-effect transistors

Šimukovič¹,

Matulionis²,

Liberis³

et al. 2013

Semicond. Sci. Technol.

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Electron density-dependent dc, rf and power characteristics are investigated for nearly lattice-matched InAlN/AlN/GaN heterostructure field-effect transistors (HFETs). The best performance in respect to transconductance and cutoff frequency is demonstrated at the optimal gate bias of −8 V for the devices with electron sheet density of 3 × 10 13 cm −2 (measured on Hall bars of as-grown heterostructures). The results are in fair agreement with the universal bias-density relation controlled by the plasmon-assisted ultrafast decay of nonequilibrium optical phonons launched by hot electrons.

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“…The small signal RF performance of this device was also measured (not shown here). A unity current gain cutoff frequency, f T , and power gain cutoff frequency, f MAX , of 2.8 and 7.9 GHz were obtained for a two-finger 2.5 μm × 100 μm device, respectively, for a device biased at V DS = 4 V and V GS = −1 V. Devices with gate length of 0.2 μm and 0.5 μm were also fabricated using the processing with mesa sidewalls passivation [17]. Excellent DC and RF performance was observed from the fabricated device as shown in Figure 12.…”

Section: Characterisation Results and Discussionmentioning

confidence: 99%

AlN/GaN-Based MOS-HEMT Technology: Processing and Device Results

Taking

MacFarlane

Wasige

2011

Active and Passive Electronic Components

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Process development of AlN/GaN MOS-HEMTs is presented, along with issues and problems concerning the fabrication processes. The developed technology uses thermally grown Al 2 O 3 as a gate dielectric and surface passivation for devices. Significant improvement in device performance was observed using the following techniques: (1) Ohmic contact optimisation using Al wet etch prior to Ohmic metal deposition and (2) mesa sidewall passivation. DC and RF performance of the fabricated devices will be presented and discussed in this paper.

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DC and RF Performance of AlN/GaN MOS-HEMTs

Cited by 9 publications

References 12 publications

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

Plasmon-controlled optimum gate bias for GaN heterostructure field-effect transistors

AlN/GaN-Based MOS-HEMT Technology: Processing and Device Results

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