2004
DOI: 10.1049/el:20040295
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DC-coupled 1.25 Gbit/s burst-mode receiver with automatic offset compensation

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Cited by 22 publications
(19 citation statements)
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“…Table II gives the parameters of the BMRx. These values correspond to measurement results reported in Section III and [5], where a preamble consisting of 12 1s and 12 0s was used. The maximum allowed input optical power is limited by the maximum input current of the preamplifier that allows correct data recovery or the maximum allowed reverse current of the APD.…”
Section: A Pon Modelsupporting
confidence: 80%
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“…Table II gives the parameters of the BMRx. These values correspond to measurement results reported in Section III and [5], where a preamble consisting of 12 1s and 12 0s was used. The maximum allowed input optical power is limited by the maximum input current of the preamplifier that allows correct data recovery or the maximum allowed reverse current of the APD.…”
Section: A Pon Modelsupporting
confidence: 80%
“…This letter focuses on the performance of the BMRx intended for PONs where the guard time and preamble length is as short as a few tens of nanoseconds [1]. To maintain high BMRx sensitivity despite higher bandwidths needed to accommodate the higher bit rates, an avalanche photodiode (APD) can be used in the upstream direction of the PON [3]- [5]. In conventional optical receivers, the avalanche gain is optimized to reach highest sensitivity.…”
mentioning
confidence: 99%
“…When compared to burst-mode receivers that use a single positive peak detector to extract the decision threshold, the problems of threshold drift due to accumulation of noise peaks and sensitivity penalty due to finite extinction ratio are solved [4], [8], [9]. The inherent rejection of the TIA dc-offset and the inclusion of an automatic offset compensation loop break the tradeoff between high gain-bandwidth required for high bit-rates on one hand and dc-accuracy required for a sensitive BMRx on the other hand.…”
Section: Resultsmentioning
confidence: 99%
“…The use of PKDs to extract the threshold instead of track-andhold (T/H) circuitry as implemented in [8] relaxes the timing requirements put on the reset signal ("Reset 1 peak detectors" in Fig. 3) of the threshold extraction circuitry.…”
Section: Burst-mode Receiver Architecturementioning
confidence: 99%
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